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author | Priyanka Jain <priyanka.jain@nxp.com> | 2017-04-27 15:08:07 +0530 |
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committer | York Sun <york.sun@nxp.com> | 2017-05-23 09:47:08 -0700 |
commit | 3049a583f343a71ead9d7cb33f0ab6cecfbbaa12 (patch) | |
tree | 8cd1822e41925299bd43a63d213e0be10bf2ceff /arch/arm/dts/fsl-ls2081a-rdb.dts | |
parent | e809e747996b00acd0ffc833999e97a3a21ddfac (diff) | |
download | u-boot-3049a583f343a71ead9d7cb33f0ab6cecfbbaa12.zip u-boot-3049a583f343a71ead9d7cb33f0ab6cecfbbaa12.tar.gz u-boot-3049a583f343a71ead9d7cb33f0ab6cecfbbaa12.tar.bz2 |
armv8: ls2080ardb: Add LS2081ARDB board support
LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/dts/fsl-ls2081a-rdb.dts')
-rw-r--r-- | arch/arm/dts/fsl-ls2081a-rdb.dts | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-rdb.dts new file mode 100644 index 0000000..6489362 --- /dev/null +++ b/arch/arm/dts/fsl-ls2081a-rdb.dts @@ -0,0 +1,59 @@ +/* + * NXP LS2081A RDB board device tree source for QSPI-boot + * + * Author: Priyanka Jain <priyanka.jain@nxp.com> + * + * Copyright 2017 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "fsl-ls2080a.dtsi" + +/ { + model = "Freescale Layerscape 2081a RDB Board"; + compatible = "fsl,ls2081a-rdb", "fsl,ls2080a"; + + aliases { + spi0 = &qspi; + spi1 = &dspi; + }; +}; + +&dspi { + bus-num = <0>; + status = "okay"; + + dflash0: n25q512a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: n25q512a@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + + qflash1: n25q512a@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <1>; + }; +}; |