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author | Graeme Russ <gruss@tss-engineering.com> | 2015-01-25 12:07:52 +1100 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2015-02-10 12:48:50 +0100 |
commit | 7a086037071401ee781425c382846dddfe80df68 (patch) | |
tree | af1c3a2f0c7c3e631e6b49fdc5f19d387a496b30 /arch/arm/cpu/arm926ejs/mxs | |
parent | 950eaf6230496585e72ebb965c458d35c6c7eac1 (diff) | |
download | u-boot-7a086037071401ee781425c382846dddfe80df68.zip u-boot-7a086037071401ee781425c382846dddfe80df68.tar.gz u-boot-7a086037071401ee781425c382846dddfe80df68.tar.bz2 |
arm: mxs: Enable booting of mx28 without battery
Section 4.1.2 of Freescale Application Note AN4199 describes the
configuration required to operate the mx28 from a 5V source without a
battery.
This patch changes the behaviour of the dropout control of the DC-DC
converter (refer to section 11.12.9 of the mx28 Application Processor
Reference Manual - Document Number: MCIMX28RM, Rev 2, 08/2013) to the
following:
- Always use 4P2 Linear Regulator if CONFIG_SYS_MXS_VDD5V_ONLY is defined
- Switch between 4P2 Linear Regulator and Battery, using whichever has
the highest voltage if CONFIG_SYS_MXS_VDD5V_ONLY isnot set (this is
the same as the pre-patch behaviour)
Signed-off-by: Graeme Russ <gruss@tss-engineering.com>
Signed-off-by: Damien Gotfroi <dgotfroi@greenwatch.be>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mxs')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 7fb734e..c342217 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -14,6 +14,13 @@ #include "mxs_init.h" +#ifdef CONFIG_SYS_MXS_VDD5V_ONLY +#define DCDC4P2_DROPOUT_CONFIG POWER_DCDC4P2_DROPOUT_CTRL_100MV | \ + POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2 +#else +#define DCDC4P2_DROPOUT_CONFIG POWER_DCDC4P2_DROPOUT_CTRL_100MV | \ + POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL +#endif /** * mxs_power_clock2xtal() - Switch CPU core clock source to 24MHz XTAL * @@ -303,8 +310,7 @@ static void mxs_power_init_4p2_params(void) clrsetbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_DROPOUT_CTRL_MASK, - POWER_DCDC4P2_DROPOUT_CTRL_100MV | - POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL); + DCDC4P2_DROPOUT_CONFIG); clrsetbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK, |