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| author | Jit Loon Lim <jit.loon.lim@intel.com> | 2024-03-12 22:01:03 +0800 |
|---|---|---|
| committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2024-03-18 14:45:47 +0800 |
| commit | 386fca68960994ece0d9da8a69a14495b5f1aedf (patch) | |
| tree | 880c6d852446a8fdcb47184986f92bb2812a2a6a /arch/arm/Kconfig | |
| parent | 3f190c55a4211215914126b74357344342329943 (diff) | |
| download | u-boot-386fca68960994ece0d9da8a69a14495b5f1aedf.zip u-boot-386fca68960994ece0d9da8a69a14495b5f1aedf.tar.gz u-boot-386fca68960994ece0d9da8a69a14495b5f1aedf.tar.bz2 | |
arch: arm: Agilex5 enablement
This patch is to enable Agilex5 platform for Intel
product. Changes, modification and new files are
created for board, dts, configs and makefile to
create the base for Agilex5.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'arch/arm/Kconfig')
| -rw-r--r-- | arch/arm/Kconfig | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 16864f8..a0c1f6b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -28,6 +28,7 @@ config COUNTER_FREQUENCY ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A default 100000000 if ARCH_ZYNQMP + default 200000000 if ARCH_SOCFPGA && ARM64 && TARGET_SOCFPGA_AGILEX5 default 0 help For platforms with ARMv8-A and ARMv7-A which features a system @@ -1126,7 +1127,8 @@ config ARCH_SOCFPGA select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 select SYSRESET select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 - select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64 + select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 && \ + TARGET_SOCFPGA_SOC64 imply CMD_DM imply CMD_MTDPARTS imply CRC32_VERIFY |