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| author | Alexander Preißner <fpga-garage@preissner-muc.de> | 2021-11-06 02:08:59 +0100 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2021-12-02 09:15:43 -0700 |
| commit | fe67ba7418a1d31341a766b3f01833803dcba4f5 (patch) | |
| tree | ad031cb5a259c4c9ed13363bf839320eeb6bf94e /README | |
| parent | f89615088fba1b1f33713ad26dbe3a3c82b692ec (diff) | |
| download | u-boot-fe67ba7418a1d31341a766b3f01833803dcba4f5.zip u-boot-fe67ba7418a1d31341a766b3f01833803dcba4f5.tar.gz u-boot-fe67ba7418a1d31341a766b3f01833803dcba4f5.tar.bz2 | |
drivers: core: lists: fix for loop index type
* fixes the bug in function bind_drivers_pass that for
CONFIG_CC_OPTIMIZE_FOR_SIZE=n and no entries in the driver_info list,
i.e. n_ents == 0, the processor steps into the first loop iteration
despite the loop condition being false.
* the Xilinx Zynq-7000 device would eventually hang due to an attempted
access to an invalid memory address
* the bug is fixed by changing the type of idx from uint to int
Board: zynq-zybo
Target: ARM
Compiler: arm-none-eabi-gcc 9.2.1
Signed-off-by: Alexander Preissner <fpga-garage@preissner-muc.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'README')
0 files changed, 0 insertions, 0 deletions