diff options
| author | Tom Rini <trini@konsulko.com> | 2022-05-24 14:14:02 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-06-06 12:09:12 -0400 |
| commit | 4c97c8cd425ff71004cdd9892ca37d46897a7084 (patch) | |
| tree | 44605d9c2fe2ae885d47e59ee510a60bcf792eb7 /README | |
| parent | 931bad1c72b5cdc030f4b972420f62de306e11d2 (diff) | |
| download | u-boot-4c97c8cd425ff71004cdd9892ca37d46897a7084.zip u-boot-4c97c8cd425ff71004cdd9892ca37d46897a7084.tar.gz u-boot-4c97c8cd425ff71004cdd9892ca37d46897a7084.tar.bz2 | |
powerpc: Switch to using CONFIG_SYS_INIT_SP_OFFSET from CONFIG_SYS_GBL_DATA_OFFSET
In the places where PowerPC references CONFIG_SYS_GBL_DATA_OFFSET it
does so as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET). And
it defines CONFIG_SYS_GBL_DATA_OFFSET in the same manner that other
architectures define CONFIG_SYS_INIT_SP_OFFSET. Other architectures
define CONFIG_SYS_INIT_SP_ADDR as (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_INIT_SP_OFFSET) typically. Rename things within PowerPC for
consistency with other architectures.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 18 |
1 files changed, 0 insertions, 18 deletions
@@ -2130,24 +2130,6 @@ Low Level (hardware related) configuration options: U-Boot uses the following memory types: - MPC8xx: IMMR (internal memory of the CPU) -- CONFIG_SYS_GBL_DATA_OFFSET: - - Offset of the initial data structure in the memory - area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually - CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial - data is located at the end of the available space - (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - - GENERATED_GBL_DATA_SIZE), and the initial stack is just - below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + - CONFIG_SYS_GBL_DATA_OFFSET) downward. - - Note: - On the MPC824X (or other systems that use the data - cache for initial memory) the address chosen for - CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must - point to an otherwise UNUSED address space between - the top of RAM and the start of the PCI space. - - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) - CONFIG_SYS_OR_TIMING_SDRAM: |