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| author | Devarsh Thakkar <devarsht@ti.com> | 2023-12-05 21:25:17 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-01-29 14:49:17 -0500 |
| commit | ba20b2443c298a19ff70d66f71630c6d16c39c97 (patch) | |
| tree | cfdc54f07c287d3d20059f15bed7e48c978a019b | |
| parent | 1d3c266758570ea7d329746ae2d5b31fb12b9f61 (diff) | |
| download | u-boot-ba20b2443c298a19ff70d66f71630c6d16c39c97.zip u-boot-ba20b2443c298a19ff70d66f71630c6d16c39c97.tar.gz u-boot-ba20b2443c298a19ff70d66f71630c6d16c39c97.tar.bz2 | |
arm: mach-k3: common: Reserve video memory from end of the RAM
Setup video memory before page table reservation using
"spl_reserve_video_from_ram_top" which ensures framebuffer memory gets
reserved from the end of RAM.
This is done to enable the next stage to directly skip the
pre-reserved area from previous stage right from the end of RAM without
having to make any gaps/holes to accommodate those regions which was the
case before as previous stage reserved region not from the end of RAM.
Use gd->ram_top instead of local ram_top and update gd->reloc_addr after
each reservation to ensure further regions are reserved properly.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
| -rw-r--r-- | arch/arm/mach-k3/common.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index fd400e7..42ceeb5 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -524,19 +524,26 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size) void spl_enable_cache(void) { #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) - phys_addr_t ram_top = CFG_SYS_SDRAM_BASE; + gd->ram_top = CFG_SYS_SDRAM_BASE; + int ret = 0; dram_init(); /* reserve TLB table */ gd->arch.tlb_size = PGTABLE_SIZE; - ram_top += get_effective_memsize(); + gd->ram_top += get_effective_memsize(); /* keep ram_top in the 32-bit address space */ - if (ram_top >= 0x100000000) - ram_top = (phys_addr_t) 0x100000000; + if (gd->ram_top >= 0x100000000) + gd->ram_top = (phys_addr_t)0x100000000; - gd->arch.tlb_addr = ram_top - gd->arch.tlb_size; + gd->relocaddr = gd->ram_top; + + ret = spl_reserve_video_from_ram_top(); + if (ret) + panic("Failed to reserve framebuffer memory (%d)\n", ret); + + gd->arch.tlb_addr = gd->relocaddr - gd->arch.tlb_size; gd->arch.tlb_addr &= ~(0x10000 - 1); debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, gd->arch.tlb_addr + gd->arch.tlb_size); |