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authorMarek BehĂșn <marek.behun@nic.cz>2021-09-26 00:54:46 +0200
committerStefan Roese <sr@denx.de>2021-10-08 08:37:55 +0200
commit8247c90e92377afbc4c6366848e56ff8c9295ffc (patch)
tree1c78e15ff8e55006710b92ec43f2e282fbfc9d45
parent96a3c989dc936d51bfd825fa4396a12600dacaa4 (diff)
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arm: a37xx: pci: Update private structure documentation
There were several changes for this structure but the documentation was not changed at the time. Fix this. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
-rw-r--r--drivers/pci/pci-aardvark.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index 3f714cd..38eff49 100644
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -186,14 +186,15 @@
/**
* struct pcie_advk - Advk PCIe controller state
*
- * @reg_base: The base address of the register space.
- * @first_busno: This driver supports multiple PCIe controllers.
- * first_busno stores the bus number of the PCIe root-port
- * number which may vary depending on the PCIe setup
- * (PEX switches etc).
- * @sec_busno: sec_busno stores the bus number for the device behind
- * the PCIe root-port
- * @device: The pointer to PCI uclass device.
+ * @base: The base address of the register space.
+ * @first_busno: Bus number of the PCIe root-port.
+ * This may vary depending on the PCIe setup.
+ * @sec_busno: Bus number for the device behind the PCIe root-port.
+ * @dev: The pointer to PCI uclass device.
+ * @reset_gpio: GPIO descriptor for PERST.
+ * @cfgcache: Buffer for emulation of PCIe Root Port's PCI Bridge registers
+ * that are not available on Aardvark.
+ * @cfgcrssve: For CRSSVE emulation.
*/
struct pcie_advk {
void *base;