Convert CONFIG_ARMV7_SECURE_BASE et al to KconfigWIP/migrate-symsc

This converts the following to Kconfig:
   CONFIG_ARMV7_SECURE_BASE
   CONFIG_ARMV7_SECURE_MAX_SIZE
   CONFIG_ARMV7_SECURE_RESERVE_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>

14 files changed, 31 insertions, 54 deletions

diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 2eeef3c..0eed8d5 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -27,6 +27,37 @@ config ARMV7_BOOT_SEC_DEFAULT
 	This can be overridden at run-time by setting the bootm_boot_mode env.
 	variable to "sec" or "nonsec".
 
+config HAS_ARMV7_SECURE_BASE
+	bool "Enable support for a ahardware secure memory area"
+	default y if ARCH_LS1021A || ARCH_MX7 || ARCH_MX7ULP || ARCH_STM32MP \
+			|| ARCH_TEGRA || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I
+
+config ARMV7_SECURE_BASE
+	hex "Base address for secure mode memory"
+	depends on HAS_ARMV7_SECURE_BASE
+	default 0xfff00000 if ARCH_TEGRA
+	default 0x2ffc0000 if ARCH_STM32MP
+	default 0x2f000000 if ARCH_MX7ULP
+	default 0x10010000 if ARCH_LS1021A
+	default 0x00900000 if ARCH_MX7
+	default 0x00044000 if MACH_SUN8I
+	default 0x00020000 if MACH_SUN6I || MACH_SUN7I
+
+config ARMV7_SECURE_RESERVE_SIZE
+	hex
+	depends on ARCH_TEGRA && HAS_ARMV7_SECURE_BASE
+	default 0x100000
+	help
+	  Reserve top 1M for secure RAM
+
+config ARMV7_SECURE_MAX_SIZE
+	hex
+	depends on ARMV7_SECURE_BASE && ARCH_STM32MP || MACH_SUN6I \
+			|| MACH_SUN7I || MACH_SUN8I
+	default 0xbc00 if MACH_SUN8I && !MACH_SUN8I_H3
+	default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3
+	default 0x10000
+
 config ARMV7_VIRT
 	bool "Enable support for hardware virtualization" if EXPERT
 	depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
index 5719264..da935f7 100644
--- a/include/configs/apalis-tk1.h
+++ b/include/configs/apalis-tk1.h
@@ -114,8 +114,4 @@
 #include "tegra-common-usb-gadget.h"
 #include "tegra-common-post.h"
 
-/* Reserve top 1M for secure RAM */
-#define CONFIG_ARMV7_SECURE_BASE		0xfff00000
-#define CONFIG_ARMV7_SECURE_RESERVE_SIZE	0x00100000
-
 #endif /* __CONFIG_H */
diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h
index 2c406d3..1cc8609 100644
--- a/include/configs/cei-tk1-som.h
+++ b/include/configs/cei-tk1-som.h
@@ -28,8 +28,4 @@
 #include "tegra-common-usb-gadget.h"
 #include "tegra-common-post.h"
 
-/* Reserve top 1M for secure RAM */
-#define CONFIG_ARMV7_SECURE_BASE		0xfff00000
-#define CONFIG_ARMV7_SECURE_RESERVE_SIZE	0x00100000
-
 #endif /* __CONFIG_H */
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index a3c385b..b4c42fd 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -26,8 +26,4 @@
 #include "tegra-common-usb-gadget.h"
 #include "tegra-common-post.h"
 
-/* Reserve top 1M for secure RAM */
-#define CONFIG_ARMV7_SECURE_BASE		0xfff00000
-#define CONFIG_ARMV7_SECURE_RESERVE_SIZE	0x00100000
-
 #endif /* __CONFIG_H */
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 4e5228a..810eee8 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -7,8 +7,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
-
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
 
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index b6501e8..27a074c 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -7,8 +7,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_ARMV7_SECURE_BASE	OCRAM_BASE_S_ADDR
-
 #define CONFIG_DEEP_SLEEP
 
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index 824078d..3742203 100644
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_ARMV7_SECURE_BASE	OCRAM_BASE_S_ADDR
-
 #define CONFIG_DEEP_SLEEP
 
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index fada8aa..a2e4c80 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -7,8 +7,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_ARMV7_SECURE_BASE	OCRAM_BASE_S_ADDR
-
 #define CONFIG_DEEP_SLEEP
 
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 2e976df..76c374a 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -31,8 +31,6 @@
 
 /* MMC */
 
-#define CONFIG_ARMV7_SECURE_BASE	0x00900000
-
 /*
  * If we have defined the OPTEE ram size and not OPTEE it means that we were
  * launched by OPTEE, because of that we shall skip all the low level
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h
index 319de9b..d3ba144 100644
--- a/include/configs/mx7ulp_com.h
+++ b/include/configs/mx7ulp_com.h
@@ -70,7 +70,5 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_ARMV7_SECURE_BASE	0x2F000000
-
 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
 #endif	/* __CONFIG_H */
diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h
index 175d546..6b40cdb 100644
--- a/include/configs/stm32mp15_common.h
+++ b/include/configs/stm32mp15_common.h
@@ -10,12 +10,6 @@
 #include <linux/sizes.h>
 #include <asm/arch/stm32.h>
 
-#ifdef CONFIG_ARMV7_PSCI
-/* PSCI support */
-#define CONFIG_ARMV7_SECURE_BASE		STM32_SYSRAM_BASE
-#define CONFIG_ARMV7_SECURE_MAX_SIZE		STM32_SYSRAM_SIZE
-#endif
-
 /*
  * Configuration of the external SRAM memory used by U-Boot
  */
diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h
index 1e490da..0b1fedd 100644
--- a/include/configs/sun6i.h
+++ b/include/configs/sun6i.h
@@ -11,13 +11,6 @@
 #define __CONFIG_H
 
 /*
- * A31 specific configuration
- */
-
-#define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
-#define CONFIG_ARMV7_SECURE_MAX_SIZE    (64 * 1024) /* 64 KB */
-
-/*
  * Include common sunxi configuration where most the settings are
  */
 #include <configs/sunxi-common.h>
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index 803a751..bc2779f 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -9,13 +9,6 @@
 #define __CONFIG_H
 
 /*
- * A20 specific configuration
- */
-
-#define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
-#define CONFIG_ARMV7_SECURE_MAX_SIZE	(64 * 1024) /* 64 KB */
-
-/*
  * Include common sunxi configuration where most the settings are
  */
 #include <configs/sunxi-common.h>
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index 5636356..106139d 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -14,16 +14,6 @@
 
 #include <asm/arch/cpu.h>
 
-#ifdef SUNXI_SRAM_A2_SIZE
-/*
- * If the SoC has enough SRAM A2, use that for the secure monitor.
- * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
- * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
- */
-#define CONFIG_ARMV7_SECURE_BASE	(SUNXI_SRAM_A2_BASE + 16 * 1024)
-#define CONFIG_ARMV7_SECURE_MAX_SIZE	(SUNXI_SRAM_A2_SIZE - 33 * 1024)
-#endif
-
 /*
  * Include common sunxi configuration where most the settings are
  */