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author | Tom Rini <trini@konsulko.com> | 2023-04-22 18:30:56 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2023-04-22 18:30:56 -0400 |
commit | f2db24556f33e8dfb8865fbc1c75e48f96be4fbf (patch) | |
tree | 798b5ec26a35d52f30bcd302c2265027bd7b9bc9 | |
parent | 03972a10acad1d4aca0db20c4744b56dfc145e8a (diff) | |
parent | 0d5bd362f61dd3dc54f9a32fd38541b8d5c5d869 (diff) | |
download | u-boot-f2db24556f33e8dfb8865fbc1c75e48f96be4fbf.zip u-boot-f2db24556f33e8dfb8865fbc1c75e48f96be4fbf.tar.gz u-boot-f2db24556f33e8dfb8865fbc1c75e48f96be4fbf.tar.bz2 |
Merge tag 'u-boot-stm32-20230419' of https://source.denx.de/u-boot/custodians/u-boot-stm
configs:
_ Add usb_pgood_delay for ST boards
_ increase malloc size for pre-reloc for stm32mp15
_ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15
dts:
_ Add QSPI support on STM32MP13x SoC family
_ Add FMC support on STM32MP13x SoC family
drivers/machine:
_ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing()
_ spi: stm32_qspi: Remove useless struct stm32_qspi_flash
_ rawnand: stm32_fmc2: remove unsupported EDO mode
_ stm32mp: fix various array bounds checks
-rw-r--r-- | arch/arm/dts/stm32mp131.dtsi | 48 | ||||
-rw-r--r-- | arch/arm/mach-stm32mp/cpu.c | 4 | ||||
-rw-r--r-- | board/st/stm32mp1/stm32mp1.c | 2 | ||||
-rw-r--r-- | configs/stm32mp15_basic_defconfig | 1 | ||||
-rw-r--r-- | configs/stm32mp15_defconfig | 3 | ||||
-rw-r--r-- | configs/stm32mp15_trusted_defconfig | 1 | ||||
-rw-r--r-- | drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl_stm32.c | 19 | ||||
-rw-r--r-- | drivers/ram/stm32mp1/stm32mp1_interactive.c | 2 | ||||
-rw-r--r-- | drivers/spi/stm32_qspi.c | 27 | ||||
-rw-r--r-- | include/configs/stm32mp13_st_common.h | 2 | ||||
-rw-r--r-- | include/configs/stm32mp15_st_common.h | 1 |
12 files changed, 79 insertions, 34 deletions
diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index 3cf51f0..6d82bf6 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -191,6 +191,54 @@ dma-requests = <48>; }; + fmc: memory-controller@58002000 { + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + #address-cells = <2>; + #size-cells = <1>; + clocks = <&rcc FMC_K>; + resets = <&rcc FMC_R>; + status = "disabled"; + + nand-controller@4,0 { + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, + <&mdma 24 0x2 0x12000a08 0x0 0x0>, + <&mdma 25 0x2 0x12000a0a 0x0 0x0>; + dma-names = "tx", "rx", "ecc"; + status = "disabled"; + }; + }; + + qspi: spi@58003000 { + compatible = "st,stm32f469-qspi"; + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; + reg-names = "qspi", "qspi_mm"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, + <&mdma 26 0x2 0x10100008 0x0 0x0>; + dma-names = "tx", "rx"; + clocks = <&rcc QSPI_K>; + resets = <&rcc QSPI_R>; + status = "disabled"; + }; + sdmmc1: mmc@58005000 { compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x20253180>; diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index dc4112d..e2f67fc 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -190,7 +190,7 @@ static void setup_boot_mode(void) __func__, boot_ctx, boot_mode, instance, forced_mode); switch (boot_mode & TAMP_BOOT_DEVICE_MASK) { case BOOT_SERIAL_UART: - if (instance > ARRAY_SIZE(serial_addr)) + if (instance >= ARRAY_SIZE(serial_addr)) break; /* serial : search associated node in devicetree */ sprintf(cmd, "serial@%x", serial_addr[instance]); @@ -220,7 +220,7 @@ static void setup_boot_mode(void) break; case BOOT_FLASH_SD: case BOOT_FLASH_EMMC: - if (instance > ARRAY_SIZE(sdmmc_addr)) + if (instance >= ARRAY_SIZE(sdmmc_addr)) break; /* search associated sdmmc node in devicetree */ sprintf(cmd, "mmc@%x", sdmmc_addr[instance]); diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index ca8f025..1a1b184 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -872,7 +872,7 @@ int mmc_get_boot(void) STM32_SDMMC3_BASE }; - if (instance > ARRAY_SIZE(sdmmc_addr)) + if (instance >= ARRAY_SIZE(sdmmc_addr)) return 0; /* search associated sdmmc node in devicetree */ diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index faf5f09..086e6bc 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_FDT_SIMPLEFB=y +CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 0005e42..a8eda7b 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y -CONFIG_SYS_MALLOC_F_LEN=0x20000 +CONFIG_SYS_MALLOC_F_LEN=0x80000 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -22,6 +22,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y +CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 06fa43b..2269156 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -23,6 +23,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y +CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index fb3279b..69dbb62 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -735,6 +735,9 @@ static int stm32_fmc2_nfc_setup_interface(struct mtd_info *mtd, int chipnr, if (IS_ERR(sdrt)) return PTR_ERR(sdrt); + if (sdrt->tRC_min < 30000) + return -EOPNOTSUPP; + if (chipnr == NAND_DATA_IFACE_CHECK_ONLY) return 0; diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index b755fa4..b06da50 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -61,6 +61,13 @@ static const char * const pinmux_otype[] = { [STM32_GPIO_OTYPE_OD] = "open-drain", }; +static const char * const pinmux_speed[] = { + [STM32_GPIO_SPEED_2M] = "Low speed", + [STM32_GPIO_SPEED_25M] = "Medium speed", + [STM32_GPIO_SPEED_50M] = "High speed", + [STM32_GPIO_SPEED_100M] = "Very-high speed", +}; + static int stm32_pinctrl_get_af(struct udevice *dev, unsigned int offset) { struct stm32_gpio_priv *priv = dev_get_priv(dev); @@ -201,6 +208,7 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, int af_num; unsigned int gpio_idx; u32 pupd, otype; + u8 speed; /* look up for the bank which owns the requested pin */ gpio_dev = stm32_pinctrl_get_gpio_dev(dev, selector, &gpio_idx); @@ -214,6 +222,7 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, priv = dev_get_priv(gpio_dev); pupd = (readl(&priv->regs->pupdr) >> (gpio_idx * 2)) & PUPD_MASK; otype = (readl(&priv->regs->otyper) >> gpio_idx) & OTYPE_MSK; + speed = (readl(&priv->regs->ospeedr) >> gpio_idx * 2) & OSPEED_MASK; switch (mode) { case GPIOF_UNKNOWN: @@ -222,13 +231,15 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, break; case GPIOF_FUNC: af_num = stm32_pinctrl_get_af(gpio_dev, gpio_idx); - snprintf(buf, size, "%s %d %s %s", pinmux_mode[mode], af_num, - pinmux_otype[otype], pinmux_bias[pupd]); + snprintf(buf, size, "%s %d %s %s %s", pinmux_mode[mode], af_num, + pinmux_otype[otype], pinmux_bias[pupd], + pinmux_speed[speed]); break; case GPIOF_OUTPUT: - snprintf(buf, size, "%s %s %s %s", + snprintf(buf, size, "%s %s %s %s %s", pinmux_mode[mode], pinmux_otype[otype], - pinmux_bias[pupd], label ? label : ""); + pinmux_bias[pupd], label ? label : "", + pinmux_speed[speed]); break; case GPIOF_INPUT: snprintf(buf, size, "%s %s %s", pinmux_mode[mode], diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c b/drivers/ram/stm32mp1/stm32mp1_interactive.c index f0fe7e6..2c19847 100644 --- a/drivers/ram/stm32mp1/stm32mp1_interactive.c +++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c @@ -391,7 +391,7 @@ bool stm32mp1_ddr_interactive(void *priv, if (next_step < 0) return false; - if (step < 0 || step > ARRAY_SIZE(step_str)) { + if (step < 0 || step >= ARRAY_SIZE(step_str)) { printf("** step %d ** INVALID\n", step); return false; } diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 90c207d..eb52ff7 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -115,15 +115,8 @@ struct stm32_qspi_regs { #define STM32_BUSY_TIMEOUT_US 100000 #define STM32_ABT_TIMEOUT_US 100000 -struct stm32_qspi_flash { - u32 cr; - u32 dcr; - bool initialized; -}; - struct stm32_qspi_priv { struct stm32_qspi_regs *regs; - struct stm32_qspi_flash flash[STM32_QSPI_MAX_CHIP]; void __iomem *mm_base; resource_size_t mm_size; ulong clock_rate; @@ -407,25 +400,11 @@ static int stm32_qspi_claim_bus(struct udevice *dev) return -ENODEV; if (priv->cs_used != slave_cs) { - struct stm32_qspi_flash *flash = &priv->flash[slave_cs]; - priv->cs_used = slave_cs; - if (flash->initialized) { - /* Set the configuration: speed + cs */ - writel(flash->cr, &priv->regs->cr); - writel(flash->dcr, &priv->regs->dcr); - } else { - /* Set chip select */ - clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL, - priv->cs_used ? STM32_QSPI_CR_FSEL : 0); - - /* Save the configuration: speed + cs */ - flash->cr = readl(&priv->regs->cr); - flash->dcr = readl(&priv->regs->dcr); - - flash->initialized = true; - } + /* Set chip select */ + clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL, + priv->cs_used ? STM32_QSPI_CR_FSEL : 0); } setbits_le32(&priv->regs->cr, STM32_QSPI_CR_EN); diff --git a/include/configs/stm32mp13_st_common.h b/include/configs/stm32mp13_st_common.h index ad8126f..20ec114 100644 --- a/include/configs/stm32mp13_st_common.h +++ b/include/configs/stm32mp13_st_common.h @@ -9,7 +9,7 @@ #define __CONFIG_STM32MP13_ST_COMMON_H__ #define STM32MP_BOARD_EXTRA_ENV \ - "usb_pgood_delay=1000\0" \ + "usb_pgood_delay=2000\0" \ "console=ttySTM0\0" #include <configs/stm32mp13_common.h> diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index d0cd413..866cd7a 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -9,6 +9,7 @@ #define __CONFIG_STM32MP15_ST_COMMON_H__ #define STM32MP_BOARD_EXTRA_ENV \ + "usb_pgood_delay=2000\0" \ "console=ttySTM0\0" #include <configs/stm32mp15_common.h> |