Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/31Jul2021

- kwboot / kwbimage improvements reducing image size (Pali & Marek)
- a37xx: pinctrl: Correct PWM pins definitions (Marek)
- Convert the Dreamplug Ethernet and SATA to Driver Model (Tony)
- serial: a37xx: DEBUG_UART improvements / fixes (Pali)

49 files changed, 730 insertions, 336 deletions

diff --git a/Makefile b/Makefile
index 8c84c22..269e353 100644
--- a/Makefile
+++ b/Makefile
@@ -1440,7 +1440,7 @@ u-boot.itb: u-boot-nodtb.bin \
 	$(BOARD_SIZE_CHECK)
 endif
 
-u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
+u-boot-spl.kwb: u-boot.bin spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)
 
 u-boot.sha1:	u-boot.bin
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 27d227d..89737a3 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -253,28 +253,32 @@ choice
 config MVEBU_SPL_BOOT_DEVICE_SPI
 	bool "SPI NOR flash"
 	imply ENV_IS_IN_SPI_FLASH
-	select SPL_DM_SPI
-	select SPL_SPI_FLASH_SUPPORT
-	select SPL_SPI_LOAD
-	select SPL_SPI_SUPPORT
+	imply SPL_DM_SPI
+	imply SPL_SPI_FLASH_SUPPORT
+	imply SPL_SPI_LOAD
+	imply SPL_SPI_SUPPORT
+	select SPL_BOOTROM_SUPPORT
 
 config MVEBU_SPL_BOOT_DEVICE_MMC
 	bool "SDIO/MMC card"
 	imply ENV_IS_IN_MMC
 	# GPIO needed for eMMC/SD card presence detection
-	select SPL_DM_GPIO
-	select SPL_DM_MMC
-	select SPL_GPIO
-	select SPL_LIBDISK_SUPPORT
-	select SPL_MMC_SUPPORT
+	imply SPL_DM_GPIO
+	imply SPL_DM_MMC
+	imply SPL_GPIO
+	imply SPL_LIBDISK_SUPPORT
+	imply SPL_MMC_SUPPORT
+	select SPL_BOOTROM_SUPPORT
 
 config MVEBU_SPL_BOOT_DEVICE_SATA
 	bool "SATA"
-	select SPL_SATA_SUPPORT
-	select SPL_LIBDISK_SUPPORT
+	imply SPL_SATA_SUPPORT
+	imply SPL_LIBDISK_SUPPORT
+	select SPL_BOOTROM_SUPPORT
 
 config MVEBU_SPL_BOOT_DEVICE_UART
 	bool "UART"
+	select SPL_BOOTROM_SUPPORT
 
 endchoice
 
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 52473ad..7985885 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -142,7 +142,7 @@ int mvebu_mbus_probe(struct mbus_win windows[], int count);
 int mvebu_soc_family(void);
 u32 mvebu_get_nand_clock(void);
 
-void return_to_bootrom(void);
+void __noreturn return_to_bootrom(void);
 
 #ifndef CONFIG_DM_MMC
 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
diff --git a/arch/arm/mach-mvebu/lowlevel_spl.S b/arch/arm/mach-mvebu/lowlevel_spl.S
index 8718d7a..dde77b7 100644
--- a/arch/arm/mach-mvebu/lowlevel_spl.S
+++ b/arch/arm/mach-mvebu/lowlevel_spl.S
@@ -13,8 +13,9 @@ ENDPROC(save_boot_params)
 ENTRY(return_to_bootrom)
 	ldr	r12, =CONFIG_SPL_BOOTROM_SAVE
 	ldr	sp, [r12]
+	ldmfd	sp!, {r0 - r12, lr}	/* @ restore registers from stack */
 	mov	r0, #0x0		/* @ return value: 0x0 NO_ERR */
-	ldmfd	sp!, {r0 - r12, pc}	/* @ restore regs and return */
+	bx	lr			/* @ return to bootrom */
 ENDPROC(return_to_bootrom)
 
 /*
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 16ebb7a..3b6bc38 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -8,6 +8,7 @@
 #include <debug_uart.h>
 #include <fdtdec.h>
 #include <hang.h>
+#include <image.h>
 #include <init.h>
 #include <log.h>
 #include <spl.h>
@@ -16,6 +17,160 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 
+#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC_SUPPORT) || defined(CONFIG_SPL_SATA_SUPPORT)
+
+/*
+ * When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
+ * point to the offset of kwbimage main header which is always at offset zero
+ * (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
+ * makes U-Boot non-bootable.
+ */
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
+#error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
+#endif
+#endif
+
+/*
+ * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
+ * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
+ * header and figure out at which sector the U-Boot proper binary is stored.
+ * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
+ * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
+ * kwbimage main header.
+ */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
+#endif
+#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
+#endif
+#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
+#endif
+#endif
+
+/*
+ * When loading U-Boot via SPL from SATA disk, the kwbimage main header is
+ * stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
+ * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
+ */
+#ifdef CONFIG_SPL_SATA_SUPPORT
+#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
+#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
+#endif
+#endif
+
+/* Boot Type - block ID */
+#define IBR_HDR_I2C_ID			0x4D
+#define IBR_HDR_SPI_ID			0x5A
+#define IBR_HDR_NAND_ID			0x8B
+#define IBR_HDR_SATA_ID			0x78
+#define IBR_HDR_PEX_ID			0x9C
+#define IBR_HDR_UART_ID			0x69
+#define IBR_HDR_SDIO_ID			0xAE
+
+/* Structure of the main header, version 1 (Armada 370/38x/XP) */
+struct kwbimage_main_hdr_v1 {
+	uint8_t  blockid;               /* 0x0       */
+	uint8_t  flags;                 /* 0x1       */
+	uint16_t reserved2;             /* 0x2-0x3   */
+	uint32_t blocksize;             /* 0x4-0x7   */
+	uint8_t  version;               /* 0x8       */
+	uint8_t  headersz_msb;          /* 0x9       */
+	uint16_t headersz_lsb;          /* 0xA-0xB   */
+	uint32_t srcaddr;               /* 0xC-0xF   */
+	uint32_t destaddr;              /* 0x10-0x13 */
+	uint32_t execaddr;              /* 0x14-0x17 */
+	uint8_t  options;               /* 0x18      */
+	uint8_t  nandblocksize;         /* 0x19      */
+	uint8_t  nandbadblklocation;    /* 0x1A      */
+	uint8_t  reserved4;             /* 0x1B      */
+	uint16_t reserved5;             /* 0x1C-0x1D */
+	uint8_t  ext;                   /* 0x1E      */
+	uint8_t  checksum;              /* 0x1F      */
+} __packed;
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+u32 spl_mmc_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
+#endif
+
+int spl_parse_board_header(struct spl_image_info *spl_image,
+			   const void *image_header, size_t size)
+{
+	const struct kwbimage_main_hdr_v1 *mhdr = image_header;
+
+	if (size < sizeof(*mhdr)) {
+		/* This should be compile time assert */
+		printf("FATAL ERROR: Image header size is too small\n");
+		hang();
+	}
+
+	/*
+	 * Very basic check for image validity. We cannot check mhdr->checksum
+	 * as it is calculated also from variable length extended headers
+	 * (including SPL content) which is not included in U-Boot image_header.
+	 */
+	if (mhdr->version != 1 ||
+	    ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) ||
+	    (
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+	     mhdr->blockid != IBR_HDR_SPI_ID &&
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+	     mhdr->blockid != IBR_HDR_SATA_ID &&
+#endif
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	     mhdr->blockid != IBR_HDR_SDIO_ID &&
+#endif
+	     1
+	    )) {
+		printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n");
+		return -EINVAL;
+	}
+
+	spl_image->offset = mhdr->srcaddr;
+
+#ifdef CONFIG_SPL_SATA_SUPPORT
+	/*
+	 * For SATA srcaddr is specified in number of sectors.
+	 * The main header is must be stored at sector number 1.
+	 * This expects that sector size is 512 bytes and recalculates
+	 * data offset to bytes relative to the main header.
+	 */
+	if (mhdr->blockid == IBR_HDR_SATA_ID) {
+		if (spl_image->offset < 1) {
+			printf("ERROR: Wrong SATA srcaddr in kwbimage\n");
+			return -EINVAL;
+		}
+		spl_image->offset -= 1;
+		spl_image->offset *= 512;
+	}
+#endif
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	/*
+	 * For SDIO (eMMC) srcaddr is specified in number of sectors.
+	 * This expects that sector size is 512 bytes and recalculates
+	 * data offset to bytes.
+	 */
+	if (mhdr->blockid == IBR_HDR_SDIO_ID)
+		spl_image->offset *= 512;
+#endif
+
+	spl_image->size = mhdr->blocksize;
+	spl_image->entry_point = mhdr->execaddr;
+	spl_image->load_addr = mhdr->destaddr;
+	spl_image->os = IH_OS_U_BOOT;
+	spl_image->name = "U-Boot";
+
+	return 0;
+}
+
 static u32 get_boot_device(void)
 {
 	u32 val;
@@ -49,11 +204,11 @@ static u32 get_boot_device(void)
 	boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
 	debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
 	switch (boot_device) {
-#if defined(CONFIG_ARMADA_38X)
+#ifdef BOOT_FROM_NAND
 	case BOOT_FROM_NAND:
 		return BOOT_DEVICE_NAND;
 #endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef BOOT_FROM_MMC
 	case BOOT_FROM_MMC:
 	case BOOT_FROM_MMC_ALT:
 		return BOOT_DEVICE_MMC1;
@@ -69,14 +224,77 @@ static u32 get_boot_device(void)
 		return BOOT_DEVICE_SATA;
 #endif
 	case BOOT_FROM_SPI:
-	default:
 		return BOOT_DEVICE_SPI;
+	default:
+		return BOOT_DEVICE_BOOTROM;
 	};
 }
 
+#else
+
+static u32 get_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+#endif
+
 u32 spl_boot_device(void)
 {
-	return get_boot_device();
+	u32 boot_device = get_boot_device();
+
+	switch (boot_device) {
+	/*
+	 * Return to the BootROM to continue the Marvell xmodem
+	 * UART boot protocol. As initiated by the kwboot tool.
+	 *
+	 * This can only be done by the BootROM since the beginning
+	 * of the image is already read and interpreted by the BootROM.
+	 * SPL has no chance to receive this information. So we
+	 * need to return to the BootROM to enable this xmodem
+	 * UART download. Use SPL infrastructure to return to BootROM.
+	 */
+	case BOOT_DEVICE_UART:
+		return BOOT_DEVICE_BOOTROM;
+
+	/*
+	 * If SPL is compiled with chosen boot_device support
+	 * then use SPL driver for loading U-Boot proper.
+	 */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	case BOOT_DEVICE_MMC1:
+		return BOOT_DEVICE_MMC1;
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+	case BOOT_FROM_SATA:
+		return BOOT_FROM_SATA;
+#endif
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+	case BOOT_DEVICE_SPI:
+		return BOOT_DEVICE_SPI;
+#endif
+
+	/*
+	 * If SPL is not compiled with chosen boot_device support
+	 * then return to the BootROM. BootROM supports loading
+	 * U-Boot proper from any valid boot_device present in SAR
+	 * register.
+	 */
+	default:
+		return BOOT_DEVICE_BOOTROM;
+	}
+}
+
+int board_return_to_bootrom(struct spl_image_info *spl_image,
+			    struct spl_boot_device *bootdev)
+{
+	u32 *regs = *(u32 **)CONFIG_SPL_BOOTROM_SAVE;
+
+	printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]);
+	return_to_bootrom();
+
+	/* NOTREACHED - return_to_bootrom() does not return */
+	hang();
 }
 
 void board_init_f(ulong dummy)
@@ -135,26 +353,4 @@ void board_init_f(ulong dummy)
 
 	/* Update read timing control for PCIe */
 	mv_rtc_config();
-
-	/*
-	 * Return to the BootROM to continue the Marvell xmodem
-	 * UART boot protocol. As initiated by the kwboot tool.
-	 *
-	 * This can only be done by the BootROM and not by the
-	 * U-Boot SPL infrastructure, since the beginning of the
-	 * image is already read and interpreted by the BootROM.
-	 * SPL has no chance to receive this information. So we
-	 * need to return to the BootROM to enable this xmodem
-	 * UART download.
-	 *
-	 * If booting from NAND lets let the BootROM load the
-	 * rest of the bootloader.
-	 */
-	switch (get_boot_device()) {
-		case BOOT_DEVICE_UART:
-#if defined(CONFIG_ARMADA_38X)
-		case BOOT_DEVICE_NAND:
-#endif
-			return_to_bootrom();
-	}
 }
diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c
index e1c64b5..d5b6b22 100644
--- a/board/Marvell/dreamplug/dreamplug.c
+++ b/board/Marvell/dreamplug/dreamplug.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
+ * Copyright (C) 2021  Tony Dinh <mibodhi@gmail.com>
  * (C) Copyright 2011
  * Jason Cooper <u-boot@lakedaemon.net>
  *
@@ -97,42 +98,75 @@ int board_init(void)
 	return 0;
 }
 
+static int fdt_get_phy_addr(const char *path)
+{
+	const void *fdt = gd->fdt_blob;
+	const u32 *reg;
+	const u32 *val;
+	int node, phandle, addr;
+
+	/* Find the node by its full path */
+	node = fdt_path_offset(fdt, path);
+	if (node >= 0) {
+		/* Look up phy-handle */
+		val = fdt_getprop(fdt, node, "phy-handle", NULL);
+		if (val) {
+			phandle = fdt32_to_cpu(*val);
+			if (!phandle)
+				return -1;
+			/* Follow it to its node */
+			node = fdt_node_offset_by_phandle(fdt, phandle);
+			if (node) {
+				/* Look up reg */
+				reg = fdt_getprop(fdt, node, "reg", NULL);
+				if (reg) {
+					addr = fdt32_to_cpu(*reg);
+					return addr;
+				}
+			}
+		}
+	}
+	return -1;
+}
+
 #ifdef CONFIG_RESET_PHY_R
-void mv_phy_88e1116_init(char *name)
+void mv_phy_88e1116_init(const char *name, const char *path)
 {
 	u16 reg;
-	u16 devadr;
+	int phyaddr;
 
 	if (miiphy_set_current_dev(name))
 		return;
 
-	/* command to read PHY dev address */
-	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
-		printf("Err..%s could not read PHY dev address\n",
-			__func__);
+	phyaddr = fdt_get_phy_addr(path);
+	if (phyaddr < 0)
 		return;
-	}
 
 	/*
 	 * Enable RGMII delay on Tx and Rx for CPU port
 	 * Ref: sec 4.7.2 of chip datasheet
 	 */
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
-	miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, &reg);
+	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
+	miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL2_REG, &reg);
 	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-	miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg);
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
+	miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL2_REG, reg);
+	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
 
 	/* reset the phy */
-	miiphy_reset(name, devadr);
+	miiphy_reset(name, phyaddr);
 
 	printf("88E1116 Initialized on %s\n", name);
 }
 
 void reset_phy(void)
 {
+	char *eth0_name = "ethernet-controller@72000";
+	char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
+	char *eth1_name = "ethernet-controller@76000";
+	char *eth1_path = "/ocp@f1000000/ethernet-controller@72000/ethernet1-port@0";
+
 	/* configure and initialize both PHY's */
-	mv_phy_88e1116_init("egiga0");
-	mv_phy_88e1116_init("egiga1");
+	mv_phy_88e1116_init(eth0_name, eth0_path);
+	mv_phy_88e1116_init(eth1_name, eth1_path);
 }
 #endif /* CONFIG_RESET_PHY_R */
diff --git a/board/gdsys/a38x/Makefile b/board/gdsys/a38x/Makefile
index 32fffab..4b13859 100644
--- a/board/gdsys/a38x/Makefile
+++ b/board/gdsys/a38x/Makefile
@@ -4,7 +4,7 @@
 # Copyright (C) 2015 Reinhard Pfau <reinhard.pfau@gdsys.cc>
 # Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
 
-obj-$(CONFIG_TARGET_CONTROLCENTERDC) += controlcenterdc.o hre.o spl.o keyprogram.o dt_helpers.o
+obj-$(CONFIG_TARGET_CONTROLCENTERDC) += controlcenterdc.o hre.o keyprogram.o dt_helpers.o
 
 ifeq ($(CONFIG_SPL_BUILD),)
 obj-$(CONFIG_TARGET_CONTROLCENTERDC) += hydra.o ihs_phys.o
diff --git a/board/gdsys/a38x/spl.c b/board/gdsys/a38x/spl.c
deleted file mode 100644
index 84864d1..0000000
--- a/board/gdsys/a38x/spl.c
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016
- * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/arch/cpu.h>
-
-void spl_board_init(void)
-{
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
-	u32 *bootrom_save = (u32 *)CONFIG_SPL_BOOTROM_SAVE;
-	u32 *regs = (u32 *)(*bootrom_save);
-
-	printf("Returning to BootROM (return address %08x)...\n", regs[13]);
-	return_to_bootrom();
-#endif
-}
diff --git a/board/kobol/helios4/Kconfig b/board/kobol/helios4/Kconfig
index cad51c1..81a2199 100644
--- a/board/kobol/helios4/Kconfig
+++ b/board/kobol/helios4/Kconfig
@@ -16,9 +16,4 @@ config ENV_SECT_SIZE
 	# Use optimistic 64 KiB erase block, will vary between actual media
 	default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
 
-config SYS_SPI_U_BOOT_OFFS
-	hex "address of u-boot payload in SPI flash"
-	default 0x20000
-	depends on MVEBU_SPL_BOOT_DEVICE_SPI
-
 endmenu
diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig
index cf95258..60d3921 100644
--- a/board/solidrun/clearfog/Kconfig
+++ b/board/solidrun/clearfog/Kconfig
@@ -54,9 +54,4 @@ config ENV_SECT_SIZE
 	# Use optimistic 64 KiB erase block, will vary between actual media
 	default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
 
-config SYS_SPI_U_BOOT_OFFS
-	hex "address of u-boot payload in SPI flash"
-	default 0x20000
-	depends on MVEBU_SPL_BOOT_DEVICE_SPI
-
 endmenu
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 9552ed4..c155a3b 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -344,7 +344,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
 	default 0x75 if ARCH_DAVINCI
 	default 0x8a if ARCH_MX6 || ARCH_MX7
 	default 0x100 if ARCH_UNIPHIER
-	default 0x140 if ARCH_MVEBU
+	default 0x0 if ARCH_MVEBU
 	default 0x200 if ARCH_SOCFPGA || ARCH_AT91
 	default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
 		         OMAP54XX || AM33XX || AM43XX || ARCH_K3
@@ -1099,6 +1099,7 @@ config SPL_SATA_SUPPORT
 config SPL_SATA_RAW_U_BOOT_USE_SECTOR
 	bool "SATA raw mode: by sector"
 	depends on SPL_SATA_SUPPORT
+	default y if ARCH_MVEBU
 	help
 	  Use sector number for specifying U-Boot location on SATA disk in
 	  raw mode.
@@ -1106,6 +1107,7 @@ config SPL_SATA_RAW_U_BOOT_USE_SECTOR
 config SPL_SATA_RAW_U_BOOT_SECTOR
 	hex "Sector on the SATA disk to load U-Boot from"
 	depends on SPL_SATA_RAW_U_BOOT_USE_SECTOR
+	default 0x1 if ARCH_MVEBU
 	help
 	  Sector on the SATA disk to load U-Boot from, when the SATA disk is being
 	  used in raw mode. Units: SATA disk sectors (1 sector = 512 bytes).
diff --git a/common/spl/spl.c b/common/spl/spl.c
index f6375b0..d55d3c2 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -300,6 +300,12 @@ static int spl_load_fit_image(struct spl_image_info *spl_image,
 }
 #endif
 
+__weak int spl_parse_board_header(struct spl_image_info *spl_image,
+				  const void *image_header, size_t size)
+{
+	return -EINVAL;
+}
+
 __weak int spl_parse_legacy_header(struct spl_image_info *spl_image,
 				   const struct image_header *header)
 {
@@ -352,6 +358,9 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 		}
 #endif
 
+		if (!spl_parse_board_header(spl_image, (const void *)header, sizeof(*header)))
+			return 0;
+
 #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
 		/* Signature not found - assume u-boot.bin */
 		debug("mkimage signature not found - ih_magic = %x\n",
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 4dff9bf..212a2b0 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -20,26 +20,40 @@
 static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,
 			   ulong sector, struct image_header *header)
 {
+	u32 image_offset_sectors;
 	u32 image_size_sectors;
 	unsigned long count;
+	u32 image_offset;
 	int ret;
 
 	ret = spl_parse_image_header(spl_image, header);
 	if (ret)
 		return ret;
 
+	/* convert offset to sectors - round down */
+	image_offset_sectors = spl_image->offset / mmc->read_bl_len;
+	/* calculate remaining offset */
+	image_offset = spl_image->offset % mmc->read_bl_len;
+
 	/* convert size to sectors - round up */
 	image_size_sectors = (spl_image->size + mmc->read_bl_len - 1) /
 			     mmc->read_bl_len;
 
 	/* Read the header too to avoid extra memcpy */
-	count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
+	count = blk_dread(mmc_get_blk_desc(mmc),
+			  sector + image_offset_sectors,
+			  image_size_sectors,
 			  (void *)(ulong)spl_image->load_addr);
 	debug("read %x sectors to %lx\n", image_size_sectors,
 	      spl_image->load_addr);
 	if (count != image_size_sectors)
 		return -EIO;
 
+	if (image_offset)
+		memmove((void *)(ulong)spl_image->load_addr,
+			(void *)(ulong)spl_image->load_addr + image_offset,
+			spl_image->size);
+
 	return 0;
 }
 
diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c
index e108af0..535a921 100644
--- a/common/spl/spl_sata.c
+++ b/common/spl/spl_sata.c
@@ -36,6 +36,8 @@ static int spl_sata_load_image_raw(struct spl_image_info *spl_image,
 	struct image_header *header;
 	unsigned long count;
 	u32 image_size_sectors;
+	u32 image_offset_sectors;
+	u32 image_offset;
 	int ret;
 
 	header = spl_get_load_buffer(-sizeof(*header), stor_dev->blksz);
@@ -48,11 +50,19 @@ static int spl_sata_load_image_raw(struct spl_image_info *spl_image,
 		return ret;
 
 	image_size_sectors = DIV_ROUND_UP(spl_image->size, stor_dev->blksz);
-	count = blk_dread(stor_dev, sector, image_size_sectors,
+	image_offset_sectors = spl_image->offset / stor_dev->blksz;
+	image_offset = spl_image->offset % stor_dev->blksz;
+	count = blk_dread(stor_dev, sector + image_offset_sectors,
+			image_size_sectors,
 			(void *)spl_image->load_addr);
 	if (count != image_size_sectors)
 		return -EIO;
 
+	if (image_offset)
+		memmove((void *)spl_image->load_addr,
+			(void *)spl_image->load_addr + image_offset,
+			spl_image->size);
+
 	return 0;
 }
 
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 6a4e033..9884e7c 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -159,7 +159,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
 			err = spl_parse_image_header(spl_image, header);
 			if (err)
 				return err;
-			err = spi_flash_read(flash, payload_offs,
+			err = spi_flash_read(flash, payload_offs + spl_image->offset,
 					     spl_image->size,
 					     (void *)spl_image->load_addr);
 		}
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 8f28eb8..d8edc45 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -24,7 +24,6 @@ CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
 CONFIG_SPL_I2C=y
 CONFIG_CMD_TLV_EEPROM=y
 CONFIG_SPL_CMD_TLV_EEPROM=y
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index 3a2aa20..bb1e095 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_CONTROLCENTERDC=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc"
 CONFIG_SPL_TEXT_BASE=0x40000030
@@ -28,7 +27,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_LAST_STAGE_INIT=y
-CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ELF is not set
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index 963f5cd..7f9d65f 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_DB_88F6720=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
 CONFIG_SPL_TEXT_BASE=0x40004030
 CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index bd23ce7..96841d7 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_DB_88F6820_AMC=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc"
 CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index be91faf..0ab8722 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_DB_88F6820_GP=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
 CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -24,7 +23,6 @@ CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_I2C=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index b56ec57..a4345ba 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_DB_MV784MP_GP=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
 CONFIG_SPL_TEXT_BASE=0x40004030
 CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 288182a..020d8b9 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -49,3 +49,7 @@ CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_DM_ETH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CMD_SATA=y
+CONFIG_SATA_MV=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 8ec7846..bfe2e5f 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_DS414=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x7E0000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
 CONFIG_SPL_TEXT_BASE=0x40004030
 CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index 77827bb..4e59360 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -24,7 +24,6 @@ CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
 CONFIG_SPL_I2C=y
 CONFIG_CMD_TLV_EEPROM=y
 CONFIG_SPL_CMD_TLV_EEPROM=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 8e8b0ff..f4e493c 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_MAXBCM=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
 CONFIG_SPL_TEXT_BASE=0x40004030
 CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 0104324..93b0c6b 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_THEADORABLE=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
 CONFIG_SPL_TEXT_BASE=0x40004030
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 298a4da..cd443ce 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -14,7 +14,6 @@ CONFIG_TARGET_TURRIS_OMNIA=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xF0000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia"
 CONFIG_SPL_TEXT_BASE=0x40000030
diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index 90798a3..6df383b 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_X530=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
 CONFIG_SPL_TEXT_BASE=0x40000030
diff --git a/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
index 86ec113..3139a99 100644
--- a/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
+++ b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
@@ -38,19 +38,19 @@ group emmc_nb
 
 group pwm0
  - pin 11 (GPIO1-11)
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pwm1
  - pin 12
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pwm2
  - pin 13
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pwm3
  - pin 14
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pmic1
  - pin 7
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index b9d389e..1cf1f06 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -160,10 +160,14 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 	PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"),
 	PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"),
 	PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"),
-	PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"),
-	PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
-	PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
-	PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
+	PIN_GRP_GPIO_3("pwm0", 11, 1, BIT(3) | BIT(20), 0, BIT(20), BIT(3),
+		       "pwm", "led"),
+	PIN_GRP_GPIO_3("pwm1", 11, 1, BIT(4) | BIT(21), 0, BIT(21), BIT(4),
+		       "pwm", "led"),
+	PIN_GRP_GPIO_3("pwm2", 11, 1, BIT(5) | BIT(22), 0, BIT(22), BIT(5),
+		       "pwm", "led"),
+	PIN_GRP_GPIO_3("pwm3", 11, 1, BIT(6) | BIT(23), 0, BIT(23), BIT(6),
+		       "pwm", "led"),
 	PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
 	PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
 	PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
@@ -177,11 +181,6 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 	PIN_GRP_EXTRA("uart2", 9, 2, BIT(1) | BIT(13) | BIT(14) | BIT(19),
 		      BIT(1) | BIT(13) | BIT(14), BIT(1) | BIT(19),
 		      18, 2, "gpio", "uart"),
-	PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"),
-	PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"),
-	PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"),
-	PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"),
-
 };
 
 static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
diff --git a/drivers/serial/serial_mvebu_a3700.c b/drivers/serial/serial_mvebu_a3700.c
index c7e66fe..6bca8e4 100644
--- a/drivers/serial/serial_mvebu_a3700.c
+++ b/drivers/serial/serial_mvebu_a3700.c
@@ -305,11 +305,12 @@ U_BOOT_DRIVER(serial_mvebu) = {
 #ifdef CONFIG_DEBUG_MVEBU_A3700_UART
 
 #include <debug_uart.h>
+#include <mach/soc.h>
 
 static inline void _debug_uart_init(void)
 {
 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
-	u32 baudrate, parent_rate, divider;
+	u32 parent_rate, divider;
 
 	/* reset FIFOs */
 	writel(UART_CTRL_RXFIFO_RESET | UART_CTRL_TXFIFO_RESET,
@@ -322,9 +323,9 @@ static inline void _debug_uart_init(void)
 	 * Calculate divider
 	 * baudrate = clock / 16 / divider
 	 */
-	baudrate = 115200;
-	parent_rate = get_ref_clk() * 1000000;
-	divider = DIV_ROUND_CLOSEST(parent_rate, baudrate * 16);
+	parent_rate = (readl(MVEBU_REGISTER(0x13808)) & BIT(9)) ?
+		      40000000 : 25000000;
+	divider = DIV_ROUND_CLOSEST(parent_rate, CONFIG_BAUDRATE * 16);
 	writel(divider, base + UART_BAUD_REG);
 
 	/*
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index c9852a7..fbdd2f0 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -69,13 +69,8 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
+#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
 /* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
 #endif
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index c4e9c79..171bd18 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -85,18 +85,9 @@
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_I2C
 
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
 /* SPL related MMC defines */
 #define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
-#define CONFIG_SYS_MMC_U_BOOT_OFFS		(168 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	(CONFIG_SYS_U_BOOT_OFFS / 512)
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
 #endif
diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
index 83c1732..410a40a 100644
--- a/include/configs/db-88f6720.h
+++ b/include/configs/db-88f6720.h
@@ -65,7 +65,4 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-
 #endif /* _CONFIG_DB_88F6720_H */
diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
index fe9a7ab..757fbc0 100644
--- a/include/configs/db-88f6820-amc.h
+++ b/include/configs/db-88f6820-amc.h
@@ -59,11 +59,6 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
 /*
  * mv-common.h should be defined after CMD configs since it used them
  * to enable certain macros
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index 5a6b428..9a34fa6 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -71,15 +71,8 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
 /* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
 #endif
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 319a291..b3c4079 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -78,9 +78,6 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
 #define CONFIG_SPD_EEPROM		0x4e
 #define CONFIG_BOARD_ECC_SUPPORT	/* this board supports ECC */
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
index 9106203..65962ee 100644
--- a/include/configs/dreamplug.h
+++ b/include/configs/dreamplug.h
@@ -31,8 +31,8 @@
 /*
  * Default environment variables
  */
-#define CONFIG_BOOTCOMMAND		"setenv ethact egiga0; " \
-	"${x_bootcmd_ethernet}; setenv ethact egiga1; " \
+#define CONFIG_BOOTCOMMAND		"setenv ethact ethernet-controller@72000; " \
+	"${x_bootcmd_ethernet}; setenv ethact ethernet-controller@76000; " \
 	"${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\
 	"setenv bootargs ${x_bootargs} ${x_bootargs_root}; "	\
 	"bootm 0x6400000;"
@@ -52,4 +52,12 @@
 #define CONFIG_PHY_BASE_ADR	0
 #endif /* CONFIG_CMD_NET */
 
+/*
+ * SATA Driver configuration
+ */
+#ifdef CONFIG_SATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#define CONFIG_LBA48
+#endif /* CONFIG_SATA */
+
 #endif /* _CONFIG_DREAMPLUG_H */
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index 80fd148..4475de2 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -68,11 +68,6 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
 /* DS414 bus width is 32bits */
 #define CONFIG_DDR_32BIT
 
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index 2cda05c..1368080 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -69,13 +69,8 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
+#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
 /* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
 #endif
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 70dd151..c6a2cfe 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -93,9 +93,6 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
 #define CONFIG_DDR_FIXED_SIZE		(2 << 20)	/* 2GiB */
 
diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index bc5a5f2..2553da1 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -45,15 +45,8 @@
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 #define CONFIG_SPL_DRIVERS_MISC
 
-#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
-/* SPL related SPI defines */
-# define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
 #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
 /* SPL related MMC defines */
-# define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
-# define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
 # ifdef CONFIG_SPL_BUILD
 #  define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
 # endif
diff --git a/include/configs/x530.h b/include/configs/x530.h
index 4446510..515c6e7 100644
--- a/include/configs/x530.h
+++ b/include/configs/x530.h
@@ -97,7 +97,4 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
-
 #endif /* _CONFIG_X530_H */
diff --git a/include/spl.h b/include/spl.h
index 925b6f0..afbf39b 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -219,6 +219,7 @@ struct spl_image_info {
 	void *fdt_addr;
 #endif
 	u32 boot_device;
+	u32 offset;
 	u32 size;
 	u32 flags;
 	void *arg;
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 66678cf..812d8f2 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3271,7 +3271,6 @@ CONFIG_SYS_USE_NAND
 CONFIG_SYS_USE_NANDFLASH
 CONFIG_SYS_USE_NORFLASH
 CONFIG_SYS_USR_EXCEP
-CONFIG_SYS_U_BOOT_OFFS
 CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
 CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
 CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT
diff --git a/tools/Makefile b/tools/Makefile
index bae3f95..4a86321 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -169,14 +169,6 @@ HOST_EXTRACFLAGS	+= -DCONFIG_FIT_SIGNATURE_MAX_SIZE=0xffffffff
 HOST_EXTRACFLAGS	+= -DCONFIG_FIT_CIPHER
 endif
 
-ifdef CONFIG_SYS_U_BOOT_OFFS
-HOSTCFLAGS_kwbimage.o += -DCONFIG_SYS_U_BOOT_OFFS=$(CONFIG_SYS_U_BOOT_OFFS)
-endif
-
-ifneq ($(CONFIG_ARMADA_38X),)
-HOSTCFLAGS_kwbimage.o += -DCONFIG_KWB_SECURE
-endif
-
 # MXSImage needs LibSSL
 ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_TOOLS_LIBCRYPTO),)
 HOSTCFLAGS_kwbimage.o += \
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 02fd0c9..00cb338 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -16,7 +16,6 @@
 #include <stdint.h>
 #include "kwbimage.h"
 
-#ifdef CONFIG_KWB_SECURE
 #include <openssl/bn.h>
 #include <openssl/rsa.h>
 #include <openssl/pem.h>
@@ -42,13 +41,10 @@ void EVP_MD_CTX_cleanup(EVP_MD_CTX *ctx)
 	EVP_MD_CTX_reset(ctx);
 }
 #endif
-#endif
 
 static struct image_cfg_element *image_cfg;
 static int cfgn;
-#ifdef CONFIG_KWB_SECURE
 static int verbose_mode;
-#endif
 
 struct boot_mode {
 	unsigned int id;
@@ -89,7 +85,7 @@ struct nand_ecc_mode nand_ecc_modes[] = {
 /* Used to identify an undefined execution or destination address */
 #define ADDR_INVALID ((uint32_t)-1)
 
-#define BINARY_MAX_ARGS 8
+#define BINARY_MAX_ARGS 255
 
 /* In-memory representation of a line of the configuration file */
 
@@ -103,8 +99,8 @@ enum image_cfg_type {
 	IMAGE_CFG_NAND_ECC_MODE,
 	IMAGE_CFG_NAND_PAGESZ,
 	IMAGE_CFG_BINARY,
-	IMAGE_CFG_PAYLOAD,
 	IMAGE_CFG_DATA,
+	IMAGE_CFG_DATA_DELAY,
 	IMAGE_CFG_BAUDRATE,
 	IMAGE_CFG_DEBUG,
 	IMAGE_CFG_KAK,
@@ -131,8 +127,8 @@ static const char * const id_strs[] = {
 	[IMAGE_CFG_NAND_ECC_MODE] = "NAND_ECC_MODE",
 	[IMAGE_CFG_NAND_PAGESZ] = "NAND_PAGE_SIZE",
 	[IMAGE_CFG_BINARY] = "BINARY",
-	[IMAGE_CFG_PAYLOAD] = "PAYLOAD",
 	[IMAGE_CFG_DATA] = "DATA",
+	[IMAGE_CFG_DATA_DELAY] = "DATA_DELAY",
 	[IMAGE_CFG_BAUDRATE] = "BAUDRATE",
 	[IMAGE_CFG_DEBUG] = "DEBUG",
 	[IMAGE_CFG_KAK] = "KAK",
@@ -157,7 +153,6 @@ struct image_cfg_element {
 			unsigned int args[BINARY_MAX_ARGS];
 			unsigned int nargs;
 		} binary;
-		const char *payload;
 		unsigned int dstaddr;
 		unsigned int execaddr;
 		unsigned int nandblksz;
@@ -165,6 +160,7 @@ struct image_cfg_element {
 		unsigned int nandeccmode;
 		unsigned int nandpagesz;
 		struct ext_hdr_v0_reg regdata;
+		unsigned int regdata_delay;
 		unsigned int baudrate;
 		unsigned int debug;
 		const char *key_name;
@@ -243,8 +239,6 @@ image_count_options(unsigned int optiontype)
 	return count;
 }
 
-#if defined(CONFIG_KWB_SECURE)
-
 static int image_get_csk_index(void)
 {
 	struct image_cfg_element *e;
@@ -267,8 +261,6 @@ static bool image_get_spezialized_img(void)
 	return e->sec_specialized_img;
 }
 
-#endif
-
 /*
  * Compute a 8-bit checksum of a memory area. This algorithm follows
  * the requirements of the Marvell SoC BootROM specifications.
@@ -363,7 +355,6 @@ static uint8_t baudrate_to_option(unsigned int baudrate)
 	}
 }
 
-#if defined(CONFIG_KWB_SECURE)
 static void kwb_msg(const char *fmt, ...)
 {
 	if (verbose_mode) {
@@ -852,8 +843,6 @@ done:
 	return ret;
 }
 
-#endif
-
 static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
 			     int payloadsz)
 {
@@ -874,11 +863,6 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
 		headersz += sizeof(struct ext_hdr_v0);
 	}
 
-	if (image_count_options(IMAGE_CFG_PAYLOAD) > 1) {
-		fprintf(stderr, "More than one payload, not possible\n");
-		return NULL;
-	}
-
 	image = malloc(headersz);
 	if (!image) {
 		fprintf(stderr, "Cannot allocate memory for image\n");
@@ -891,7 +875,7 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
 
 	/* Fill in the main header */
 	main_hdr->blocksize =
-		cpu_to_le32(payloadsz + sizeof(uint32_t) - headersz);
+		cpu_to_le32(payloadsz - headersz);
 	main_hdr->srcaddr   = cpu_to_le32(headersz);
 	main_hdr->ext       = has_ext;
 	main_hdr->destaddr  = cpu_to_le32(params->addr);
@@ -941,7 +925,9 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
 static size_t image_headersz_v1(int *hasext)
 {
 	struct image_cfg_element *binarye;
+	unsigned int count;
 	size_t headersz;
+	int cfgi;
 
 	/*
 	 * Calculate the size of the header and the size of the
@@ -949,21 +935,18 @@ static size_t image_headersz_v1(int *hasext)
 	 */
 	headersz = sizeof(struct main_hdr_v1);
 
-	if (image_count_options(IMAGE_CFG_BINARY) > 1) {
-		fprintf(stderr, "More than one binary blob, not supported\n");
-		return 0;
-	}
-
-	if (image_count_options(IMAGE_CFG_PAYLOAD) > 1) {
-		fprintf(stderr, "More than one payload, not possible\n");
-		return 0;
-	}
+	count = image_count_options(IMAGE_CFG_DATA);
+	if (count > 0)
+		headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4;
 
-	binarye = image_find_option(IMAGE_CFG_BINARY);
-	if (binarye) {
+	for (cfgi = 0; cfgi < cfgn; cfgi++) {
 		int ret;
 		struct stat s;
 
+		binarye = &image_cfg[cfgi];
+		if (binarye->type != IMAGE_CFG_BINARY)
+			continue;
+
 		ret = stat(binarye->binary.file, &s);
 		if (ret < 0) {
 			char cwd[PATH_MAX];
@@ -978,38 +961,23 @@ static size_t image_headersz_v1(int *hasext)
 			fprintf(stderr,
 				"Didn't find the file '%s' in '%s' which is mandatory to generate the image\n"
 				"This file generally contains the DDR3 training code, and should be extracted from an existing bootable\n"
-				"image for your board. See 'kwbimage -x' to extract it from an existing image.\n",
+				"image for your board. Use 'dumpimage -T kwbimage -p 0' to extract it from an existing image.\n",
 				binarye->binary.file, dir);
 			return 0;
 		}
 
 		headersz += sizeof(struct opt_hdr_v1) +
-			s.st_size +
+			ALIGN(s.st_size, 4) +
 			(binarye->binary.nargs + 2) * sizeof(uint32_t);
 		if (hasext)
 			*hasext = 1;
 	}
 
-#if defined(CONFIG_KWB_SECURE)
 	if (image_get_csk_index() >= 0) {
 		headersz += sizeof(struct secure_hdr_v1);
 		if (hasext)
 			*hasext = 1;
 	}
-#endif
-
-#if defined(CONFIG_SYS_U_BOOT_OFFS)
-	if (headersz > CONFIG_SYS_U_BOOT_OFFS) {
-		fprintf(stderr,
-			"Error: Image header (incl. SPL image) too big!\n");
-		fprintf(stderr, "header=0x%x CONFIG_SYS_U_BOOT_OFFS=0x%x!\n",
-			(int)headersz, CONFIG_SYS_U_BOOT_OFFS);
-		fprintf(stderr, "Increase CONFIG_SYS_U_BOOT_OFFS!\n");
-		return 0;
-	}
-
-	headersz = CONFIG_SYS_U_BOOT_OFFS;
-#endif
 
 	/*
 	 * The payload should be aligned on some reasonable
@@ -1018,10 +986,10 @@ static size_t image_headersz_v1(int *hasext)
 	return ALIGN(headersz, 4096);
 }
 
-int add_binary_header_v1(uint8_t *cur)
+int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext,
+			 struct image_cfg_element *binarye)
 {
-	struct image_cfg_element *binarye;
-	struct opt_hdr_v1 *hdr = (struct opt_hdr_v1 *)cur;
+	struct opt_hdr_v1 *hdr = (struct opt_hdr_v1 *)*cur;
 	uint32_t *args;
 	size_t binhdrsz;
 	struct stat s;
@@ -1029,11 +997,6 @@ int add_binary_header_v1(uint8_t *cur)
 	FILE *bin;
 	int ret;
 
-	binarye = image_find_option(IMAGE_CFG_BINARY);
-
-	if (!binarye)
-		return 0;
-
 	hdr->headertype = OPT_HDR_V1_BINARY_TYPE;
 
 	bin = fopen(binarye->binary.file, "r");
@@ -1051,28 +1014,21 @@ int add_binary_header_v1(uint8_t *cur)
 
 	binhdrsz = sizeof(struct opt_hdr_v1) +
 		(binarye->binary.nargs + 2) * sizeof(uint32_t) +
-		s.st_size;
-
-	/*
-	 * The size includes the binary image size, rounded
-	 * up to a 4-byte boundary. Plus 4 bytes for the
-	 * next-header byte and 3-byte alignment at the end.
-	 */
-	binhdrsz = ALIGN(binhdrsz, 4) + 4;
+		ALIGN(s.st_size, 4);
 	hdr->headersz_lsb = cpu_to_le16(binhdrsz & 0xFFFF);
 	hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16;
 
-	cur += sizeof(struct opt_hdr_v1);
+	*cur += sizeof(struct opt_hdr_v1);
 
-	args = (uint32_t *)cur;
+	args = (uint32_t *)*cur;
 	*args = cpu_to_le32(binarye->binary.nargs);
 	args++;
 	for (argi = 0; argi < binarye->binary.nargs; argi++)
 		args[argi] = cpu_to_le32(binarye->binary.args[argi]);
 
-	cur += (binarye->binary.nargs + 1) * sizeof(uint32_t);
+	*cur += (binarye->binary.nargs + 1) * sizeof(uint32_t);
 
-	ret = fread(cur, s.st_size, 1, bin);
+	ret = fread(*cur, s.st_size, 1, bin);
 	if (ret != 1) {
 		fprintf(stderr,
 			"Could not read binary image %s\n",
@@ -1082,17 +1038,13 @@ int add_binary_header_v1(uint8_t *cur)
 
 	fclose(bin);
 
-	cur += ALIGN(s.st_size, 4);
+	*cur += ALIGN(s.st_size, 4);
 
-	/*
-	 * For now, we don't support more than one binary
-	 * header, and no other header types are
-	 * supported. So, the binary header is necessarily the
-	 * last one
-	 */
-	*((uint32_t *)cur) = 0x00000000;
+	*((uint32_t *)*cur) = 0x00000000;
+	**next_ext = 1;
+	*next_ext = *cur;
 
-	cur += sizeof(uint32_t);
+	*cur += sizeof(uint32_t);
 
 	return 0;
 
@@ -1102,8 +1054,6 @@ err_close:
 	return -1;
 }
 
-#if defined(CONFIG_KWB_SECURE)
-
 int export_pub_kak_hash(RSA *kak, struct secure_hdr_v1 *secure_hdr)
 {
 	FILE *hashf;
@@ -1211,20 +1161,19 @@ int add_secure_header_v1(struct image_tool_params *params, uint8_t *ptr,
 
 	return 0;
 }
-#endif
 
 static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
 			     uint8_t *ptr, int payloadsz)
 {
 	struct image_cfg_element *e;
 	struct main_hdr_v1 *main_hdr;
-#if defined(CONFIG_KWB_SECURE)
+	struct register_set_hdr_v1 *register_set_hdr;
 	struct secure_hdr_v1 *secure_hdr = NULL;
-#endif
 	size_t headersz;
 	uint8_t *image, *cur;
 	int hasext = 0;
 	uint8_t *next_ext = NULL;
+	int cfgi, datai, size;
 
 	/*
 	 * Calculate the size of the header and the size of the
@@ -1249,11 +1198,10 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
 
 	/* Fill the main header */
 	main_hdr->blocksize    =
-		cpu_to_le32(payloadsz - headersz + sizeof(uint32_t));
+		cpu_to_le32(payloadsz - headersz);
 	main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF);
 	main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16;
-	main_hdr->destaddr     = cpu_to_le32(params->addr)
-				 - sizeof(image_header_t);
+	main_hdr->destaddr     = cpu_to_le32(params->addr);
 	main_hdr->execaddr     = cpu_to_le32(params->ep);
 	main_hdr->srcaddr      = cpu_to_le32(headersz);
 	main_hdr->ext          = hasext;
@@ -1273,15 +1221,29 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
 	e = image_find_option(IMAGE_CFG_DEBUG);
 	if (e)
 		main_hdr->flags = e->debug ? 0x1 : 0;
-	e = image_find_option(IMAGE_CFG_BINARY);
-	if (e) {
-		char *s = strrchr(e->binary.file, '/');
 
-		if (strcmp(s, "/binary.0") == 0)
-			main_hdr->destaddr = cpu_to_le32(params->addr);
-	}
+	/*
+	 * For SATA srcaddr is specified in number of sectors starting from
+	 * sector 0. The main header is stored at sector number 1.
+	 * This expects the sector size to be 512 bytes.
+	 * Header size is already aligned.
+	 */
+	if (main_hdr->blockid == IBR_HDR_SATA_ID)
+		main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1);
+
+	/*
+	 * For SDIO srcaddr is specified in number of sectors starting from
+	 * sector 0. The main header is stored at sector number 0.
+	 * This expects sector size to be 512 bytes.
+	 * Header size is already aligned.
+	 */
+	if (main_hdr->blockid == IBR_HDR_SDIO_ID)
+		main_hdr->srcaddr = cpu_to_le32(headersz / 512);
+
+	/* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */
+	if (main_hdr->blockid == IBR_HDR_PEX_ID)
+		main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF);
 
-#if defined(CONFIG_KWB_SECURE)
 	if (image_get_csk_index() >= 0) {
 		/*
 		 * only reserve the space here; we fill the header later since
@@ -1289,19 +1251,59 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
 		 */
 		secure_hdr = (struct secure_hdr_v1 *)cur;
 		cur += sizeof(struct secure_hdr_v1);
+		*next_ext = 1;
 		next_ext = &secure_hdr->next;
 	}
-#endif
-	*next_ext = 1;
 
-	if (add_binary_header_v1(cur))
-		return NULL;
+	datai = 0;
+	register_set_hdr = (struct register_set_hdr_v1 *)cur;
+	for (cfgi = 0; cfgi < cfgn; cfgi++) {
+		e = &image_cfg[cfgi];
+		if (e->type != IMAGE_CFG_DATA &&
+		    e->type != IMAGE_CFG_DATA_DELAY)
+			continue;
+		if (e->type == IMAGE_CFG_DATA_DELAY) {
+			size = sizeof(struct register_set_hdr_v1) + 8 * datai + 4;
+			register_set_hdr->headertype = OPT_HDR_V1_REGISTER_TYPE;
+			register_set_hdr->headersz_lsb = cpu_to_le16(size & 0xFFFF);
+			register_set_hdr->headersz_msb = size >> 16;
+			register_set_hdr->data[datai].last_entry.delay = e->regdata_delay;
+			cur += size;
+			*next_ext = 1;
+			next_ext = &register_set_hdr->data[datai].last_entry.next;
+			datai = 0;
+			continue;
+		}
+		register_set_hdr->data[datai].entry.address =
+			cpu_to_le32(e->regdata.raddr);
+		register_set_hdr->data[datai].entry.value =
+			cpu_to_le32(e->regdata.rdata);
+		datai++;
+	}
+	if (datai != 0) {
+		size = sizeof(struct register_set_hdr_v1) + 8 * datai + 4;
+		register_set_hdr->headertype = OPT_HDR_V1_REGISTER_TYPE;
+		register_set_hdr->headersz_lsb = cpu_to_le16(size & 0xFFFF);
+		register_set_hdr->headersz_msb = size >> 16;
+		/* Set delay to the smallest possible value 1ms. */
+		register_set_hdr->data[datai].last_entry.delay = 1;
+		cur += size;
+		*next_ext = 1;
+		next_ext = &register_set_hdr->data[datai].last_entry.next;
+	}
+
+	for (cfgi = 0; cfgi < cfgn; cfgi++) {
+		e = &image_cfg[cfgi];
+		if (e->type != IMAGE_CFG_BINARY)
+			continue;
+
+		if (add_binary_header_v1(&cur, &next_ext, e))
+			return NULL;
+	}
 
-#if defined(CONFIG_KWB_SECURE)
 	if (secure_hdr && add_secure_header_v1(params, ptr, payloadsz,
 					       headersz, image, secure_hdr))
 		return NULL;
-#endif
 
 	/* Calculate and set the header checksum */
 	main_hdr->checksum = image_checksum8(main_hdr, headersz);
@@ -1408,6 +1410,12 @@ static int image_create_config_parse_oneline(char *line,
 		el->regdata.raddr = strtoul(value1, NULL, 16);
 		el->regdata.rdata = strtoul(value2, NULL, 16);
 		break;
+	case IMAGE_CFG_DATA_DELAY:
+		if (!strcmp(value1, "SDRAM_SETUP"))
+			el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP;
+		else
+			el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_MS(strtoul(value1, NULL, 10));
+		break;
 	case IMAGE_CFG_BAUDRATE:
 		el->baudrate = strtoul(value1, NULL, 10);
 		break;
@@ -1510,6 +1518,17 @@ static int image_get_version(void)
 	return e->version;
 }
 
+static int image_get_bootfrom(void)
+{
+	struct image_cfg_element *e;
+
+	e = image_find_option(IMAGE_CFG_BOOT_FROM);
+	if (!e)
+		return -1;
+
+	return e->bootfrom;
+}
+
 static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 				struct image_tool_params *params)
 {
@@ -1519,7 +1538,6 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 	size_t headersz = 0;
 	uint32_t checksum;
 	int ret;
-	int size;
 
 	fcfg = fopen(params->imagename, "r");
 	if (!fcfg) {
@@ -1547,9 +1565,6 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 		exit(EXIT_FAILURE);
 	}
 
-	/* The MVEBU BootROM does not allow non word aligned payloads */
-	sbuf->st_size = ALIGN(sbuf->st_size, 4);
-
 	version = image_get_version();
 	switch (version) {
 		/*
@@ -1580,16 +1595,10 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 	free(image_cfg);
 
 	/* Build and add image checksum header */
-	checksum =
-		cpu_to_le32(image_checksum32((uint32_t *)ptr, sbuf->st_size));
-	size = write(ifd, &checksum, sizeof(uint32_t));
-	if (size != sizeof(uint32_t)) {
-		fprintf(stderr, "Error:%s - Checksum write %d bytes %s\n",
-			params->cmdname, size, params->imagefile);
-		exit(EXIT_FAILURE);
-	}
-
-	sbuf->st_size += sizeof(uint32_t);
+	checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + headersz,
+				sbuf->st_size - headersz - sizeof(uint32_t)));
+	memcpy((uint8_t *)ptr + sbuf->st_size - sizeof(uint32_t), &checksum,
+		sizeof(uint32_t));
 
 	/* Finally copy the header into the image area */
 	memcpy(ptr, image, headersz);
@@ -1604,6 +1613,30 @@ static void kwbimage_print_header(const void *ptr)
 	printf("Image Type:   MVEBU Boot from %s Image\n",
 	       image_boot_mode_name(mhdr->blockid));
 	printf("Image version:%d\n", image_version((void *)ptr));
+	if (image_version((void *)ptr) == 1) {
+		struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
+
+		if (mhdr->ext & 0x1) {
+			struct opt_hdr_v1 *ohdr = (struct opt_hdr_v1 *)
+						  ((uint8_t *)ptr +
+						   sizeof(*mhdr));
+
+			while (1) {
+				uint32_t ohdr_size;
+
+				ohdr_size = (ohdr->headersz_msb << 16) |
+					    le16_to_cpu(ohdr->headersz_lsb);
+				if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) {
+					printf("BIN Hdr Size: ");
+					genimg_print_size(ohdr_size - 12 - 4 * ohdr->data[0]);
+				}
+				if (!(*((uint8_t *)ohdr + ohdr_size - 4) & 0x1))
+					break;
+				ohdr = (struct opt_hdr_v1 *)((uint8_t *)ohdr +
+							     ohdr_size);
+			}
+		}
+	}
 	printf("Data Size:    ");
 	genimg_print_size(mhdr->blocksize - sizeof(uint32_t));
 	printf("Load Address: %08x\n", mhdr->destaddr);
@@ -1632,14 +1665,90 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size,
 
 	/* Only version 0 extended header has checksum */
 	if (image_version((void *)ptr) == 0) {
-		struct ext_hdr_v0 *ext_hdr;
+		struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr;
 
-		ext_hdr = (struct ext_hdr_v0 *)
+		if (mhdr->ext & 0x1) {
+			struct ext_hdr_v0 *ext_hdr;
+
+			ext_hdr = (struct ext_hdr_v0 *)
 				(ptr + sizeof(struct main_hdr_v0));
-		checksum = image_checksum8(ext_hdr,
-					   sizeof(struct ext_hdr_v0)
-					   - sizeof(uint8_t));
-		if (checksum != ext_hdr->checksum)
+			checksum = image_checksum8(ext_hdr,
+						   sizeof(struct ext_hdr_v0)
+						   - sizeof(uint8_t));
+			if (checksum != ext_hdr->checksum)
+				return -FDT_ERR_BADSTRUCTURE;
+		}
+	}
+
+	if (image_version((void *)ptr) == 1) {
+		struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
+		uint32_t offset;
+		uint32_t size;
+
+		if (mhdr->ext & 0x1) {
+			uint32_t ohdr_size;
+			struct opt_hdr_v1 *ohdr = (struct opt_hdr_v1 *)
+						  (ptr + sizeof(*mhdr));
+
+			while (1) {
+				if ((uint8_t *)ohdr + sizeof(*ohdr) >
+				    (uint8_t *)mhdr + header_size)
+					return -FDT_ERR_BADSTRUCTURE;
+
+				ohdr_size = (ohdr->headersz_msb << 16) |
+					    le16_to_cpu(ohdr->headersz_lsb);
+
+				if (ohdr_size < 8 ||
+				    (uint8_t *)ohdr + ohdr_size >
+				    (uint8_t *)mhdr + header_size)
+					return -FDT_ERR_BADSTRUCTURE;
+
+				if (!(*((uint8_t *)ohdr + ohdr_size - 4) & 0x1))
+					break;
+				ohdr = (struct opt_hdr_v1 *)((uint8_t *)ohdr +
+							     ohdr_size);
+			}
+		}
+
+		offset = le32_to_cpu(mhdr->srcaddr);
+
+		/*
+		 * For SATA srcaddr is specified in number of sectors.
+		 * The main header is must be stored at sector number 1.
+		 * This expects that sector size is 512 bytes and recalculates
+		 * data offset to bytes relative to the main header.
+		 */
+		if (mhdr->blockid == IBR_HDR_SATA_ID) {
+			if (offset < 1)
+				return -FDT_ERR_BADSTRUCTURE;
+			offset -= 1;
+			offset *= 512;
+		}
+
+		/*
+		 * For SDIO srcaddr is specified in number of sectors.
+		 * This expects that sector size is 512 bytes and recalculates
+		 * data offset to bytes.
+		 */
+		if (mhdr->blockid == IBR_HDR_SDIO_ID)
+			offset *= 512;
+
+		/*
+		 * For PCIe srcaddr is always set to 0xFFFFFFFF.
+		 * This expects that data starts after all headers.
+		 */
+		if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF)
+			offset = header_size;
+
+		if (offset > image_size || offset % 4 != 0)
+			return -FDT_ERR_BADSTRUCTURE;
+
+		size = le32_to_cpu(mhdr->blocksize);
+		if (offset + size > image_size || size % 4 != 0)
+			return -FDT_ERR_BADSTRUCTURE;
+
+		if (image_checksum32(ptr + offset, size - 4) !=
+		    *(uint32_t *)(ptr + offset + size - 4))
 			return -FDT_ERR_BADSTRUCTURE;
 	}
 
@@ -1650,7 +1759,9 @@ static int kwbimage_generate(struct image_tool_params *params,
 			     struct image_type_params *tparams)
 {
 	FILE *fcfg;
+	struct stat s;
 	int alloc_len;
+	int bootfrom;
 	int version;
 	void *hdr;
 	int ret;
@@ -1662,6 +1773,12 @@ static int kwbimage_generate(struct image_tool_params *params,
 		exit(EXIT_FAILURE);
 	}
 
+	if (stat(params->datafile, &s)) {
+		fprintf(stderr, "Could not stat data file %s: %s\n",
+			params->datafile, strerror(errno));
+		exit(EXIT_FAILURE);
+	}
+
 	image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
 			   sizeof(struct image_cfg_element));
 	if (!image_cfg) {
@@ -1681,6 +1798,7 @@ static int kwbimage_generate(struct image_tool_params *params,
 		exit(EXIT_FAILURE);
 	}
 
+	bootfrom = image_get_bootfrom();
 	version = image_get_version();
 	switch (version) {
 		/*
@@ -1719,12 +1837,77 @@ static int kwbimage_generate(struct image_tool_params *params,
 	/*
 	 * The resulting image needs to be 4-byte aligned. At least
 	 * the Marvell hdrparser tool complains if its unaligned.
-	 * By returning 1 here in this function, called via
-	 * tparams->vrec_header() in mkimage.c, mkimage will
-	 * automatically pad the the resulting image to a 4-byte
-	 * size if necessary.
+	 * After the image data is stored 4-byte checksum.
+	 * Final SPI and NAND images must be aligned to 256 bytes.
+	 * Final SATA and SDIO images must be aligned to 512 bytes.
 	 */
-	return 1;
+	if (bootfrom == IBR_HDR_SPI_ID || bootfrom == IBR_HDR_NAND_ID)
+		return 4 + (256 - (alloc_len + s.st_size + 4) % 256) % 256;
+	else if (bootfrom == IBR_HDR_SATA_ID || bootfrom == IBR_HDR_SDIO_ID)
+		return 4 + (512 - (alloc_len + s.st_size + 4) % 512) % 512;
+	else
+		return 4 + (4 - s.st_size % 4) % 4;
+}
+
+static int kwbimage_extract_subimage(void *ptr, struct image_tool_params *params)
+{
+	struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
+	size_t header_size = kwbimage_header_size(ptr);
+	int idx = params->pflag;
+	int cur_idx = 0;
+	uint32_t offset;
+	ulong image;
+	ulong size;
+
+	if (image_version((void *)ptr) == 1 && (mhdr->ext & 0x1)) {
+		struct opt_hdr_v1 *ohdr = (struct opt_hdr_v1 *)
+					  ((uint8_t *)ptr +
+					   sizeof(*mhdr));
+
+		while (1) {
+			uint32_t ohdr_size = (ohdr->headersz_msb << 16) |
+					     le16_to_cpu(ohdr->headersz_lsb);
+
+			if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) {
+				if (idx == cur_idx) {
+					image = (ulong)&ohdr->data[4 +
+					         4 * ohdr->data[0]];
+					size = ohdr_size - 12 -
+					       4 * ohdr->data[0];
+					goto extract;
+				}
+				++cur_idx;
+			}
+			if (!(*((uint8_t *)ohdr + ohdr_size - 4) & 0x1))
+				break;
+			ohdr = (struct opt_hdr_v1 *)((uint8_t *)ohdr +
+						     ohdr_size);
+		}
+	}
+
+	if (idx != cur_idx) {
+		printf("Image %d is not present\n", idx);
+		return -1;
+	}
+
+	offset = le32_to_cpu(mhdr->srcaddr);
+
+	if (mhdr->blockid == IBR_HDR_SATA_ID) {
+		offset -= 1;
+		offset *= 512;
+	}
+
+	if (mhdr->blockid == IBR_HDR_SDIO_ID)
+		offset *= 512;
+
+	if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF)
+		offset = header_size;
+
+	image = (ulong)((uint8_t *)ptr + offset);
+	size = le32_to_cpu(mhdr->blocksize) - 4;
+
+extract:
+	return imagetool_save_subimage(params->outfile, image, size);
 }
 
 /*
@@ -1732,7 +1915,7 @@ static int kwbimage_generate(struct image_tool_params *params,
  */
 static int kwbimage_check_params(struct image_tool_params *params)
 {
-	if (!strlen(params->imagename)) {
+	if (!params->iflag && (!params->imagename || !strlen(params->imagename))) {
 		char *msg = "Configuration file for kwbimage creation omitted";
 
 		fprintf(stderr, "Error:%s - %s\n", params->cmdname, msg);
@@ -1742,7 +1925,7 @@ static int kwbimage_check_params(struct image_tool_params *params)
 	return (params->dflag && (params->fflag || params->lflag)) ||
 		(params->fflag && (params->dflag || params->lflag)) ||
 		(params->lflag && (params->dflag || params->fflag)) ||
-		(params->xflag) || !(strlen(params->imagename));
+		(params->xflag);
 }
 
 /*
@@ -1757,7 +1940,7 @@ U_BOOT_IMAGE_TYPE(
 	kwbimage_verify_header,
 	kwbimage_print_header,
 	kwbimage_set_header,
-	NULL,
+	kwbimage_extract_subimage,
 	kwbimage_check_image_types,
 	NULL,
 	kwbimage_generate
diff --git a/tools/kwbimage.h b/tools/kwbimage.h
index 0b6d05b..e063e3e 100644
--- a/tools/kwbimage.h
+++ b/tools/kwbimage.h
@@ -11,6 +11,12 @@
 #include <compiler.h>
 #include <stdint.h>
 
+#ifdef __GNUC__
+#define __packed __attribute((packed))
+#else
+#define __packed
+#endif
+
 #define KWBIMAGE_MAX_CONFIG	((0x1dc - 0x20)/sizeof(struct reg_config))
 #define MAX_TEMPBUF_LEN		32
 
@@ -27,7 +33,8 @@
 #define IBR_HDR_SATA_ID			0x78
 #define IBR_HDR_PEX_ID			0x9C
 #define IBR_HDR_UART_ID			0x69
-#define IBR_DEF_ATTRIB	 		0x00
+#define IBR_HDR_SDIO_ID			0xAE
+#define IBR_DEF_ATTRIB			0x00
 
 /* Structure of the main header, version 0 (Kirkwood, Dove) */
 struct main_hdr_v0 {
@@ -45,12 +52,12 @@ struct main_hdr_v0 {
 	uint16_t rsvd2;			/* 0x1C-0x1D */
 	uint8_t  ext;			/* 0x1E      */
 	uint8_t  checksum;		/* 0x1F      */
-};
+} __packed;
 
 struct ext_hdr_v0_reg {
 	uint32_t raddr;
 	uint32_t rdata;
-};
+} __packed;
 
 #define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
 
@@ -60,12 +67,12 @@ struct ext_hdr_v0 {
 	struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
 	uint8_t               reserved2[7];
 	uint8_t               checksum;
-};
+} __packed;
 
 struct kwb_header {
 	struct main_hdr_v0	kwb_hdr;
 	struct ext_hdr_v0	kwb_exthdr;
-};
+} __packed;
 
 /* Structure of the main header, version 1 (Armada 370/38x/XP) */
 struct main_hdr_v1 {
@@ -86,7 +93,7 @@ struct main_hdr_v1 {
 	uint16_t reserved5;             /* 0x1C-0x1D */
 	uint8_t  ext;                   /* 0x1E      */
 	uint8_t  checksum;              /* 0x1F      */
-};
+} __packed;
 
 /*
  * Main header options
@@ -108,21 +115,21 @@ struct opt_hdr_v1 {
 	uint8_t  headersz_msb;
 	uint16_t headersz_lsb;
 	char     data[0];
-};
+} __packed;
 
 /*
  * Public Key data in DER format
  */
 struct pubkey_der_v1 {
 	uint8_t key[524];
-};
+} __packed;
 
 /*
  * Signature (RSA 2048)
  */
 struct sig_v1 {
 	uint8_t sig[256];
-};
+} __packed;
 
 /*
  * Structure of secure header (Armada 38x)
@@ -145,7 +152,34 @@ struct secure_hdr_v1 {
 	uint8_t  next;			/* 0x25E0 */
 	uint8_t  reserved4;		/* 0x25E1 */
 	uint16_t reserved5;		/* 0x25E2 - 0x25E3 */
-};
+} __packed;
+
+/*
+ * Structure of register set
+ */
+struct register_set_hdr_v1 {
+	uint8_t  headertype;		/* 0x0 */
+	uint8_t  headersz_msb;		/* 0x1 */
+	uint16_t headersz_lsb;		/* 0x2 - 0x3 */
+	union {
+		struct {
+			uint32_t address;	/* 0x4+8*N - 0x7+8*N */
+			uint32_t value;		/* 0x8+8*N - 0xB+8*N */
+		} __packed entry;
+		struct {
+			uint8_t  next;		/* 0xC+8*N */
+			uint8_t  delay;		/* 0xD+8*N */
+			uint16_t reserved;	/* 0xE+8*N - 0xF+8*N */
+		} __packed last_entry;
+	} data[];
+} __packed;
+
+/*
+ * Value 0 in register_set_hdr_v1 delay field is special.
+ * Instead of delay it setup SDRAM Controller.
+ */
+#define REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP 0
+#define REGISTER_SET_HDR_OPT_DELAY_MS(val) ((val) ?: 1)
 
 /*
  * Various values for the opt_hdr_v1->headertype field, describing the
diff --git a/tools/kwboot.c b/tools/kwboot.c
index 4be094c..7feeaa4 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -26,12 +26,6 @@
 #include <sys/mman.h>
 #include <sys/stat.h>
 
-#ifdef __GNUC__
-#define PACKED __attribute((packed))
-#else
-#define PACKED
-#endif
-
 /*
  * Marvell BootROM UART Sensing
  */
@@ -68,7 +62,7 @@ struct kwboot_block {
 	uint8_t _pnum;
 	uint8_t data[128];
 	uint8_t csum;
-} PACKED;
+} __packed;
 
 #define KWBOOT_BLK_RSP_TIMEO 1000 /* ms */
 
@@ -471,7 +465,7 @@ kwboot_term_pipe(int in, int out, char *quit, int *s)
 	ssize_t nin, nout;
 	char _buf[128], *buf = _buf;
 
-	nin = read(in, buf, sizeof(buf));
+	nin = read(in, buf, sizeof(_buf));
 	if (nin <= 0)
 		return -1;
 
@@ -485,13 +479,14 @@ kwboot_term_pipe(int in, int out, char *quit, int *s)
 					return 0;
 				buf++;
 				nin--;
-			} else
+			} else {
 				while (*s > 0) {
 					nout = write(out, quit, *s);
 					if (nout <= 0)
 						return -1;
 					(*s) -= nout;
 				}
+			}
 		}
 	}
 
@@ -564,7 +559,9 @@ kwboot_terminal(int tty)
 		}
 	} while (quit[s] != 0);
 
-	tcsetattr(in, TCSANOW, &otio);
+	if (in >= 0)
+		tcsetattr(in, TCSANOW, &otio);
+	printf("\n");
 out:
 	return rc;
 }
@@ -637,7 +634,7 @@ kwboot_img_patch_hdr(void *img, size_t size)
 	}
 
 	image_ver = image_version(img);
-	if (image_ver < 0) {
+	if (image_ver != 0 && image_ver != 1) {
 		fprintf(stderr, "Invalid image header version\n");
 		errno = EINVAL;
 		goto out;
@@ -648,6 +645,11 @@ kwboot_img_patch_hdr(void *img, size_t size)
 	else
 		hdrsz = KWBHEADER_V1_SIZE(hdr);
 
+	if (size < hdrsz) {
+		errno = EINVAL;
+		goto out;
+	}
+
 	csum = kwboot_img_csum8(hdr, hdrsz) - hdr->checksum;
 	if (csum != hdr->checksum) {
 		errno = EINVAL;