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authorTom Rini <trini@konsulko.com>2021-03-30 11:24:09 -0400
committerTom Rini <trini@konsulko.com>2021-03-30 11:24:09 -0400
commit7d23eb9260d5ce0ccb219a17cfc90c29101d4fa5 (patch)
tree18a337967a56497ae811501c06676beb91b4e357
parent1057b1be75386e3513dca392d8258e01e5cccc01 (diff)
parentbbfb81c1876f32b8991cf34cf0fa5525e9f28afd (diff)
downloadu-boot-WIP/30Mar2021-next.zip
u-boot-WIP/30Mar2021-next.tar.gz
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Merge tag 'u-boot-atmel-2021.07-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel into nextWIP/30Mar2021-next
First set of u-boot-atmel features for 2021.07 cycle: This small feature set includes the implementation of the slew rate for the PIO4 pin controller device, and a fix for arm926ejs-based microprocessors that avoids a crash.
-rw-r--r--arch/arm/mach-at91/arm926ejs/lowlevel_init.S16
-rw-r--r--arch/arm/mach-at91/include/mach/atmel_pio4.h1
-rw-r--r--doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt7
-rw-r--r--drivers/pinctrl/pinctrl-at91-pio4.c26
4 files changed, 36 insertions, 14 deletions
diff --git a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
index 71d7582..994f42e 100644
--- a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
@@ -71,10 +71,10 @@ POS1:
str r0, [r1]
/* Reading the PMC Status to detect when the Main Oscillator is enabled */
- mov r4, #AT91_PMC_IXR_MOSCS
+ mov r6, #AT91_PMC_IXR_MOSCS
MOSCS_Loop:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_MOSCS
bne MOSCS_Loop
@@ -89,10 +89,10 @@ MOSCS_Loop:
str r0, [r1]
/* Reading the PMC Status register to detect when the PLLA is locked */
- mov r4, #AT91_PMC_IXR_LOCKA
+ mov r6, #AT91_PMC_IXR_LOCKA
MOSCS_Loop1:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_LOCKA
bne MOSCS_Loop1
@@ -109,10 +109,10 @@ MOSCS_Loop1:
str r0, [r1]
/* Reading the PMC Status to detect when the Master clock is ready */
- mov r4, #AT91_PMC_IXR_MCKRDY
+ mov r6, #AT91_PMC_IXR_MCKRDY
MCKRDY_Loop:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_MCKRDY
bne MCKRDY_Loop
@@ -120,10 +120,10 @@ MCKRDY_Loop:
str r0, [r1]
/* Reading the PMC Status to detect when the Master clock is ready */
- mov r4, #AT91_PMC_IXR_MCKRDY
+ mov r6, #AT91_PMC_IXR_MCKRDY
MCKRDY_Loop1:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_MCKRDY
bne MCKRDY_Loop1
PLL_setup_end:
diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h b/arch/arm/mach-at91/include/mach/atmel_pio4.h
index 35ac7b2..c3bd914 100644
--- a/arch/arm/mach-at91/include/mach/atmel_pio4.h
+++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h
@@ -44,6 +44,7 @@ struct atmel_pio4_port {
#define ATMEL_PIO_DIR_MASK BIT(8)
#define ATMEL_PIO_PUEN_MASK BIT(9)
#define ATMEL_PIO_PDEN_MASK BIT(10)
+#define ATMEL_PIO_SR BIT(11)
#define ATMEL_PIO_IFEN_MASK BIT(12)
#define ATMEL_PIO_IFSCEN_MASK BIT(13)
#define ATMEL_PIO_OPD_MASK BIT(14)
diff --git a/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
index 9252dc1..6e936a0 100644
--- a/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
+++ b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
@@ -25,9 +25,10 @@ ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the
right representation of the pin.
Optional properties:
-- GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable,
-bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable,
-input-debounce.
+- GENERIC_PINCONFIG: generic pinconfig options to use:
+ - bias-disable, bias-pull-down, bias-pull-up, drive-open-drain,
+ input-schmitt-enable, input-debounce
+ - slew-rate: 0 - disabled, 1 - enabled (default)
- atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for
high drive. The default value is low drive.
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index b7ae2f6..26fb5d6 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -25,6 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct atmel_pio4_plat {
struct atmel_pio4_port *reg_base;
+ unsigned int slew_rate_support;
};
static const struct pinconf_param conf_params[] = {
@@ -36,9 +37,11 @@ static const struct pinconf_param conf_params[] = {
{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
{ "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
{ "atmel,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
+ { "slew-rate", PIN_CONFIG_SLEW_RATE, 0},
};
-static u32 atmel_pinctrl_get_pinconf(struct udevice *config)
+static u32 atmel_pinctrl_get_pinconf(struct udevice *config,
+ struct atmel_pio4_plat *plat)
{
const struct pinconf_param *params;
u32 param, arg, conf = 0;
@@ -53,6 +56,10 @@ static u32 atmel_pinctrl_get_pinconf(struct udevice *config)
param = params->param;
arg = params->default_value;
+ /* Keep slew rate enabled by default. */
+ if (plat->slew_rate_support)
+ conf |= ATMEL_PIO_SR;
+
switch (param) {
case PIN_CONFIG_BIAS_DISABLE:
conf &= (~ATMEL_PIO_PUEN_MASK);
@@ -91,6 +98,15 @@ static u32 atmel_pinctrl_get_pinconf(struct udevice *config)
conf |= (val << ATMEL_PIO_DRVSTR_OFFSET)
& ATMEL_PIO_DRVSTR_MASK;
break;
+ case PIN_CONFIG_SLEW_RATE:
+ if (!plat->slew_rate_support)
+ break;
+
+ dev_read_u32(config, params->property, &val);
+ /* And disable it if requested. */
+ if (val == 0)
+ conf &= ~ATMEL_PIO_SR;
+ break;
default:
printf("%s: Unsupported configuration parameter: %u\n",
__func__, param);
@@ -116,6 +132,7 @@ static inline struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,
static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
{
+ struct atmel_pio4_plat *plat = dev_get_plat(dev);
struct atmel_pio4_port *bank_base;
const void *blob = gd->fdt_blob;
int node = dev_of_offset(config);
@@ -124,7 +141,7 @@ static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
u32 i, conf;
int count;
- conf = atmel_pinctrl_get_pinconf(config);
+ conf = atmel_pinctrl_get_pinconf(config, plat);
count = fdtdec_get_int_array_count(blob, node, "pinmux",
cells, ARRAY_SIZE(cells));
@@ -164,6 +181,7 @@ const struct pinctrl_ops atmel_pinctrl_ops = {
static int atmel_pinctrl_probe(struct udevice *dev)
{
struct atmel_pio4_plat *plat = dev_get_plat(dev);
+ ulong priv = dev_get_driver_data(dev);
fdt_addr_t addr_base;
dev = dev_get_parent(dev);
@@ -172,13 +190,15 @@ static int atmel_pinctrl_probe(struct udevice *dev)
return -EINVAL;
plat->reg_base = (struct atmel_pio4_port *)addr_base;
+ plat->slew_rate_support = priv;
return 0;
}
static const struct udevice_id atmel_pinctrl_match[] = {
{ .compatible = "atmel,sama5d2-pinctrl" },
- { .compatible = "microchip,sama7g5-pinctrl" },
+ { .compatible = "microchip,sama7g5-pinctrl",
+ .data = (ulong)1, },
{}
};