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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-08-27 11:04:01 +0000 |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-08-28 13:47:45 +0530 |
| commit | ba827365f7e1ad7546e6ec3098221ebd1bcfaf27 (patch) | |
| tree | 2e3324d6c6758d9fab8ab672dbc025b3277e5076 | |
| parent | 7e4248c5d835ab840609e408c3754658936c6cce (diff) | |
| download | u-boot-ba827365f7e1ad7546e6ec3098221ebd1bcfaf27.zip u-boot-ba827365f7e1ad7546e6ec3098221ebd1bcfaf27.tar.gz u-boot-ba827365f7e1ad7546e6ec3098221ebd1bcfaf27.tar.bz2 | |
dm: pcie_fsl: Add PCIe support for P1 and P2 series SoCs
Add compatible string for PCIe of P1020, P1021, P1024, P1025
and P2020 SoCs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| -rw-r--r-- | drivers/pci/pcie_fsl.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index a085c0c..31cb5d2 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -610,6 +610,12 @@ static const struct dm_pci_ops fsl_pcie_ops = { .write_config = fsl_pcie_write_config, }; +static struct fsl_pcie_data p1_p2_data = { + .block_offset = 0xa000, + .block_offset_mask = 0xffff, + .stride = 0x1000, +}; + static struct fsl_pcie_data t2080_data = { .block_offset = 0x240000, .block_offset_mask = 0x3fffff, @@ -617,6 +623,7 @@ static struct fsl_pcie_data t2080_data = { }; static const struct udevice_id fsl_pcie_ids[] = { + { .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t104x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, |