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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2020-06-09 13:53:45 +0300 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2021-01-07 09:44:15 +0200 |
| commit | 3e5853e6a1b5aa239b1143420e789bca880ef165 (patch) | |
| tree | 41abe34cb7321ca04affd7e9b8e2eb83bb689aed | |
| parent | e95af87e9b4f6a251329da5ee1fa72dcf54abb86 (diff) | |
| download | u-boot-3e5853e6a1b5aa239b1143420e789bca880ef165.zip u-boot-3e5853e6a1b5aa239b1143420e789bca880ef165.tar.gz u-boot-3e5853e6a1b5aa239b1143420e789bca880ef165.tar.bz2 | |
ARM: dts: sama7g5: add GMAC1
Add GMAC1.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| -rw-r--r-- | arch/arm/dts/sama7g5.dtsi | 8 | ||||
| -rw-r--r-- | arch/arm/dts/sama7g5ek.dts | 27 |
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index df271a7..17710e4 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -125,6 +125,14 @@ assigned-clock-rates = <125000000>; status = "disabled"; }; + + gmac1: ethernet@e2804000 { + compatible = "cdns,sama7g5-emac"; + reg = <0xe2804000 0x1000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; }; }; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 194f464..3eac948 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -66,6 +66,19 @@ }; }; +&gmac1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac1_default>; + phy-mode = "rmii"; + status = "okay"; + + ethernet-phy@0 { + reg = <0x0>; + }; +}; + &pinctrl { pinctrl_flx3_default: flx3_default { pinmux = <PIN_PD16__FLEXCOM3_IO0>, @@ -108,4 +121,18 @@ <PIN_PA25__G0_125CK>; bias-disable; }; + + pinctrl_gmac1_default: gmac1_default { + pinmux = <PIN_PD30__G1_TXCK>, + <PIN_PD22__G1_TX0>, + <PIN_PD23__G1_TX1>, + <PIN_PD21__G1_TXEN>, + <PIN_PD25__G1_RX0>, + <PIN_PD26__G1_RX1>, + <PIN_PD27__G1_RXER>, + <PIN_PD24__G1_RXDV>, + <PIN_PD28__G1_MDC>, + <PIN_PD29__G1_MDIO>; + bias-disable; + }; }; |