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| author | Michal Simek <michal.simek@xilinx.com> | 2021-08-24 14:56:47 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-08-26 08:14:43 +0200 |
| commit | 229cb5c6ba3469cbc4a0bcc69389fe61c51fd3b4 (patch) | |
| tree | a69bb46c22a5b7f6da77948349f874d6ff3efb86 | |
| parent | 060fa0e11bde87a22898b2c152b701e25dcfe0db (diff) | |
| download | u-boot-229cb5c6ba3469cbc4a0bcc69389fe61c51fd3b4.zip u-boot-229cb5c6ba3469cbc4a0bcc69389fe61c51fd3b4.tar.gz u-boot-229cb5c6ba3469cbc4a0bcc69389fe61c51fd3b4.tar.bz2 | |
xilinx: zynqmp: Enable stack relocation to DDR
There is no space in OCM for SPL stack because the space in OCM is occupied
by TF-A. That's why move relocate stack to DDR to 0x18000000 address
and also enable SPL_SIZE_LIMIT not to be more then 0xfffea000 which is
default address for TFA.
It is good to summarize current DDR usage in SPL flow.
0-0x80000 is used for BSS
(CONFIG_SPL_BSS_START_ADDR, CONFIG_SPL_BSS_MAX_SIZE)
0x100000 is used for DTB passing address
(CONFIG_XILINX_OF_BOARD_DTB_ADDR)
0x17fffe70 - CONFIG_SPL_STACK_R_ADDR - is used for GD
0x18000000 is used for SPL stack
(CONFIG_SPL_STACK_R_ADDR)
0x20000000-0x21000000 is used for SPL malloc area
(CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | configs/xilinx_zynqmp_virt_defconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index f516ab6..7ccce6f 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -8,6 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" +CONFIG_SPL_STACK_R_ADDR=0x18000000 +CONFIG_SPL_SIZE_LIMIT=0x2a000 +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -26,6 +29,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_STACK_R=y CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_RAM_SUPPORT=y |