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authorRan Wang <ran.wang_1@nxp.com>2017-10-23 10:09:24 +0800
committerYork Sun <york.sun@nxp.com>2017-10-27 08:47:06 -0700
commitd4c746c7b1f802685f75fa531a88104b19861a8c (patch)
tree832b86dbdeffa208200d9b3bb8f75ef8210ee95e
parent90be2fe37e8e9a63266ff27ebe35c362353fe8e3 (diff)
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armv8: ls1088ardb: Enable USB command RDB qspi-boot
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
-rw-r--r--arch/arm/dts/fsl-ls1088a.dtsi14
-rw-r--r--configs/ls1088ardb_qspi_defconfig8
-rw-r--r--include/linux/usb/xhci-fsl.h2
3 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index d943a9e..64b4fcf 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -76,6 +76,20 @@
num-cs = <4>;
};
+ usb0: usb3@3100000 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x3100000 0x0 0x10000>;
+ interrupts = <0 80 0x4>; /* Level high type */
+ dr_mode = "host";
+ };
+
+ usb1: usb3@3110000 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x3110000 0x0 0x10000>;
+ interrupts = <0 81 0x4>; /* Level high type */
+ dr_mode = "host";
+ };
+
pcie@3400000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 0909c0a..bd44fa9 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -31,3 +31,11 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_CMD_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_STORAGE=y
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index bd54089..a916afb 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -58,7 +58,7 @@ struct fsl_xhci {
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
-#elif defined(CONFIG_ARCH_LS2080A)
+#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0