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| author | Biwen Li <biwen.li@nxp.com> | 2020-05-01 20:56:37 +0800 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-05-04 09:12:36 +0530 |
| commit | 01d97d5f18a28dfbb8d5e033f2408040fb4f8134 (patch) | |
| tree | aade00e9bdf2f5704286159e51343de6d3fe3f0d | |
| parent | 70571f981b01e900c2ae320f7f06726ce69291bd (diff) | |
| download | u-boot-01d97d5f18a28dfbb8d5e033f2408040fb4f8134.zip u-boot-01d97d5f18a28dfbb8d5e033f2408040fb4f8134.tar.gz u-boot-01d97d5f18a28dfbb8d5e033f2408040fb4f8134.tar.bz2 | |
dm: ppc: MPC8548CDS: add i2c DM support
This supports i2c DM for board MPC8548CDS
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| -rw-r--r-- | board/freescale/common/sys_eeprom.c | 3 | ||||
| -rw-r--r-- | include/configs/MPC8548CDS.h | 9 |
2 files changed, 10 insertions, 2 deletions
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 6f151b0..c487e3a 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -595,6 +595,7 @@ unsigned int get_cpu_board_revision(void) (void *)&be, sizeof(be)); #else struct udevice *dev; + int ret; #ifdef CONFIG_SYS_EEPROM_BUS_NUM ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM, CONFIG_SYS_I2C_EEPROM_ADDR, @@ -603,7 +604,7 @@ unsigned int get_cpu_board_revision(void) #else ret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, - &dev) + &dev); #endif if (!ret) dm_i2c_read(dev, 0, (void *)&be, sizeof(be)); diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index a68d190..b779623 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2004, 2007, 2010-2011 Freescale Semiconductor. + * Copyright 2020 NXP */ /* @@ -304,12 +305,18 @@ extern unsigned long get_clock_freq(void); /* * I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } +#else +#define CONFIG_SYS_SPD_BUS_NUM 0 +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif +#define CONFIG_SYS_I2C_FSL /* EEPROM */ #define CONFIG_ID_EEPROM |