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authorTom Rini <trini@konsulko.com>2021-12-14 13:36:36 -0500
committerTom Rini <trini@konsulko.com>2021-12-27 16:20:18 -0500
commit2196a4a7efa8bb9bb5f28617611300d7d06efa5b (patch)
tree41bf17d0c21d8d9210be04773e59950ad0ee3da6
parentba1ed5b022c6f6360e2fd514c3855f89eaa8d353 (diff)
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arm: s5pc1xx: Move CONFIG_SYS_CLK_FREQ_C1x0 out of CONFIG namespace
The values CONFIG_SYS_CLK_FREQ_C100 and CONFIG_SYS_CLK_FREQ_C110 are only used in one place and not changed by the board config file. Move these out of the CONFIG namespace and in to the CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/arm/mach-s5pc1xx/clock.c12
-rw-r--r--include/configs/s5p_goni.h3
2 files changed, 4 insertions, 11 deletions
diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c
index 555228a..c90c341 100644
--- a/arch/arm/mach-s5pc1xx/clock.c
+++ b/arch/arm/mach-s5pc1xx/clock.c
@@ -14,12 +14,8 @@
#define CLK_D 1
#define CLK_P 2
-#ifndef CONFIG_SYS_CLK_FREQ_C100
-#define CONFIG_SYS_CLK_FREQ_C100 12000000
-#endif
-#ifndef CONFIG_SYS_CLK_FREQ_C110
-#define CONFIG_SYS_CLK_FREQ_C110 24000000
-#endif
+#define CFG_SYS_CLK_FREQ_C100 12000000
+#define CFG_SYS_CLK_FREQ_C110 24000000
/* s5pc110: return pll clock frequency */
static unsigned long s5pc100_get_pll_clk(int pllreg)
@@ -66,7 +62,7 @@ static unsigned long s5pc100_get_pll_clk(int pllreg)
s = r & 0x7;
/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
- freq = CONFIG_SYS_CLK_FREQ_C100;
+ freq = CFG_SYS_CLK_FREQ_C100;
fout = m * (freq / (p * (1 << s)));
return fout;
@@ -116,7 +112,7 @@ static unsigned long s5pc110_get_pll_clk(int pllreg)
/* SDIV [2:0] */
s = r & 0x7;
- freq = CONFIG_SYS_CLK_FREQ_C110;
+ freq = CFG_SYS_CLK_FREQ_C110;
if (pllreg == APLL) {
if (s < 1)
s = 1;
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 14840a4..e3b091a 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -18,9 +18,6 @@
#include <linux/sizes.h>
#include <asm/arch/cpu.h> /* get chip and board defs */
-/* input clock of PLL: has 24MHz input clock at S5PC110 */
-#define CONFIG_SYS_CLK_FREQ_C110 24000000
-
/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x30000000