Convert CONFIG_TPL_TEXT_BASE to Kconfig

This converts the following to Kconfig:
   CONFIG_TPL_TEXT_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>

17 files changed, 13 insertions, 23 deletions

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index da6871e..c4645a0 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -8,7 +8,6 @@ config ROCKCHIP_PX30
 	select SPL
 	select TPL
 	select TPL_TINY_FRAMEWORK if TPL
-	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
 	imply SPL_SEPARATE_BSS
 	select SPL_SERIAL
@@ -80,7 +79,6 @@ config ROCKCHIP_RK322X
 	select TPL
 	select TPL_DM
 	select TPL_OF_LIBFDT
-	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
 	select SPL_DRIVERS_MISC
 	imply ROCKCHIP_COMMON_BOARD
@@ -112,7 +110,6 @@ config ROCKCHIP_RK3288
 	imply TPL_DRIVERS_MISC
 	imply TPL_LIBCOMMON_SUPPORT
 	imply TPL_LIBGENERIC_SUPPORT
-	imply TPL_NEEDS_SEPARATE_TEXT_BASE
 	imply TPL_NEEDS_SEPARATE_STACK
 	imply TPL_OF_CONTROL
 	imply TPL_OF_PLATDATA
@@ -160,7 +157,6 @@ config ROCKCHIP_RK3328
 	select SPL
 	select SUPPORT_TPL
 	select TPL
-	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
 	imply ROCKCHIP_COMMON_BOARD
 	imply ROCKCHIP_SDRAM_COMMON
@@ -183,7 +179,6 @@ config ROCKCHIP_RK3368
 	select ARM64
 	select SUPPORT_SPL
 	select SUPPORT_TPL
-	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
 	imply ROCKCHIP_COMMON_BOARD
 	imply SPL_ROCKCHIP_COMMON_BOARD
@@ -216,7 +211,6 @@ config ROCKCHIP_RK3399
 	select SPL_RAM if SPL
 	select SPL_REGMAP if SPL
 	select SPL_SYSCON if SPL
-	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
 	select SPL_SEPARATE_BSS
 	select SPL_SERIAL
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 17ce2f6..4a739a7 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1351,14 +1351,6 @@ config TPL_LDSCRIPT
 	  May be left empty to trigger the Makefile infrastructure to
 	  fall back to the linker-script used for the SPL stage.
 
-config TPL_NEEDS_SEPARATE_TEXT_BASE
-	bool "TPL needs a separate text-base"
-	depends on TPL
-	help
-	  Enable, if the TPL stage should not inherit its text-base
-	  from the SPL stage.  When enabled, a base address for the
-	  .text sections of the TPL stage has to be set below.
-
 config TPL_NEEDS_SEPARATE_STACK
 	bool "TPL needs a separate initial stack-pointer"
 	depends on TPL
@@ -1380,7 +1372,6 @@ config TPL_POWER
 
 config TPL_TEXT_BASE
 	hex "Base address for the .text section of the TPL stage"
-	depends on TPL_NEEDS_SEPARATE_TEXT_BASE
 	help
 	  The base address for the .text section of the TPL stage.
 
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 052b93d..4a85dba 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index b18da3f..e2e78d4 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 1ee304b..00724e0 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 70565e7..656bd3b 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index eeb174a..2e7d0b2 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 39a2710..2529685 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index cc3a1f6..130dea9 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index d365f4e..ef85cf0 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 19b76ee..c9abf3d 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index 2dd37f6..785314a 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -6,6 +6,7 @@ CONFIG_MAX_CPUS=8
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral"
 CONFIG_SPL_TEXT_BASE=0xfef10000
+CONFIG_TPL_TEXT_BASE=0xffff8000
 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000
 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index 3cc25b5..c3c133b 100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
 CONFIG_SPL_TEXT_BASE=0xffe70000
+CONFIG_TPL_TEXT_BASE=0xfffd8000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 3a9672b..838cdee 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -70,7 +70,6 @@
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_TPL_TEXT_BASE		0xD0001000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
@@ -102,7 +101,7 @@
 #endif
 
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	0xD0001000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SPL_TEXT_BASE
 #else
diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h
index 27e60d8..0eeea80 100644
--- a/include/configs/chromebook_coral.h
+++ b/include/configs/chromebook_coral.h
@@ -18,8 +18,6 @@
 					"stdout=vidconsole,serial\0" \
 					"stderr=vidconsole,serial\0"
 
-#define CONFIG_TPL_TEXT_BASE		0xffff8000
-
 #define CONFIG_SYS_NS16550_MEM32
 #undef CONFIG_SYS_NS16550_PORT_MAPPED
 
diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h
index 2fe3e72..9d5a63c 100644
--- a/include/configs/chromebook_samus.h
+++ b/include/configs/chromebook_samus.h
@@ -23,6 +23,4 @@
 					"stdout=vidconsole,serial\0" \
 					"stderr=vidconsole,serial\0"
 
-#define CONFIG_TPL_TEXT_BASE		0xfffd8000
-
 #endif	/* __CONFIG_H */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 33f052d..b907a1a 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -102,7 +102,6 @@
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_TPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
@@ -130,7 +129,7 @@
 
 #ifndef CONFIG_SYS_MONITOR_BASE
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	0xf8f81000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SPL_TEXT_BASE
 #else