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| author | Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> | 2020-12-05 17:29:18 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-12-26 12:36:35 +0100 |
| commit | 50b1a69cee0dc06d0c713a5a978998f2b4a9cb31 (patch) | |
| tree | 1d43116c3a2eb97b6a776c58bb0f58d39de2f3b9 | |
| parent | 247bbeb74c186963d9365db3136d0285618bd9a7 (diff) | |
| download | u-boot-50b1a69cee0dc06d0c713a5a978998f2b4a9cb31.zip u-boot-50b1a69cee0dc06d0c713a5a978998f2b4a9cb31.tar.gz u-boot-50b1a69cee0dc06d0c713a5a978998f2b4a9cb31.tar.bz2 | |
ARM: dts: imx8m: add UHS or HS400/HS400ES properties
i.MX8M series provide support for high speed grades in their
usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks
to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
| -rw-r--r-- | arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 | ||||
| -rw-r--r-- | arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mq-evk-u-boot.dtsi | 9 |
6 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475..9e0d264 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@ &usdhc1 { u-boot,dm-spl; + mmc-hs400-1_8v; }; &usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; }; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab63..701af44 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@ &usdhc1 { u-boot,dm-spl; + mmc-hs400-1_8v; }; &usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c..e843a56 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@ &usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; }; &usdhc3 { u-boot,dm-spl; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; }; &i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b98..025090f 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@ &usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; }; &usdhc3 { u-boot,dm-spl; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; }; &wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e91..4f00b5a 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@ &usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; }; &usdhc3 { u-boot,dm-spl; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; }; &wdog1 { diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi index 4712cf6..44af663 100644 --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi @@ -3,3 +3,12 @@ ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; }; + +&usdhc1 { + mmc-hs400-1_8v; +}; + +&usdhc2 { + sd-uhs-sdr104; + sd-uhs-ddr50; +}; |