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| author | Marek Vasut <marex@denx.de> | 2021-09-14 05:25:35 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2021-09-22 21:30:39 +0200 |
| commit | cb3ed86cf1f4ba97250cf3649a2d43012dd661fd (patch) | |
| tree | 4cf8eed1572b325dda72c85214b58c97f76a59ce | |
| parent | c3880e65975bd40ba025b9fafa5732a98ea9e736 (diff) | |
| download | u-boot-cb3ed86cf1f4ba97250cf3649a2d43012dd661fd.zip u-boot-cb3ed86cf1f4ba97250cf3649a2d43012dd661fd.tar.gz u-boot-cb3ed86cf1f4ba97250cf3649a2d43012dd661fd.tar.bz2 | |
arm: socfpga: vining: Enable DW I2C driver
The Designware I2C IP is used to communicate with I2C peripherals on
SoCFPGA, and required to access I2C EEPROM on this board. Enable it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
| -rw-r--r-- | configs/socfpga_vining_fpga_defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 4dcf4f7..cbdb897 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -56,6 +56,7 @@ CONFIG_DFU_SF=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_DW=y CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y CONFIG_LED_STATUS0=y |