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| author | Oleksandr Suvorov <oleksandr.suvorov@foundries.io> | 2021-09-08 21:56:43 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-10-07 21:58:49 +0200 |
| commit | fa0223a75946ad3aec2596dac34d88f2dcca7baa (patch) | |
| tree | 83a9de28154eee826825b5d1e8ca5271a7dce70d | |
| parent | c1412cbb17b2f6cd6c2301d7102346bec3a260d6 (diff) | |
| download | u-boot-fa0223a75946ad3aec2596dac34d88f2dcca7baa.zip u-boot-fa0223a75946ad3aec2596dac34d88f2dcca7baa.tar.gz u-boot-fa0223a75946ad3aec2596dac34d88f2dcca7baa.tar.bz2 | |
mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP
Import HS400 support for iMX7ULP B0 from the Linux kernel:
2eaf5a533afd ("mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP")
According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET
before any setting of STROBE_DLL_CTRL register.
USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL)
for slave sel value. If this register bits value is 0, it needs
256 ref_clk cycles to update slave sel value. IC suggest to set
bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave
sel value. This will short the lock time of slave.
i.MX7ULP B0 will need more time to lock the REF and SLV, so change
to add 5us delay.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
| -rw-r--r-- | drivers/mmc/fsl_esdhc_imx.c | 10 | ||||
| -rw-r--r-- | include/fsl_esdhc_imx.h | 1 |
2 files changed, 8 insertions, 3 deletions
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 2ee53c7..4c06361 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -727,17 +727,20 @@ static void esdhc_set_strobe_dll(struct mmc *mmc) if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) { esdhc_write32(®s->strobe_dllctrl, ESDHC_STROBE_DLL_CTRL_RESET); + /* clear the reset bit on strobe dll before any setting */ + esdhc_write32(®s->strobe_dllctrl, 0); /* * enable strobe dll ctrl and adjust the delay target * for the uSDHC loopback read clock */ val = ESDHC_STROBE_DLL_CTRL_ENABLE | + ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT | (priv->strobe_dll_delay_target << ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT); esdhc_write32(®s->strobe_dllctrl, val); - /* wait 1us to make sure strobe dll status register stable */ - mdelay(1); + /* wait 5us to make sure strobe dll status register stable */ + mdelay(5); val = esdhc_read32(®s->strobe_dllstat); if (!(val & ESDHC_STROBE_DLL_STS_REF_LOCK)) pr_warn("HS400 strobe DLL status REF not lock!\n"); @@ -1709,7 +1712,8 @@ static struct esdhc_soc_data usdhc_imx7d_data = { static struct esdhc_soc_data usdhc_imx7ulp_data = { .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING - | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200, + | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 + | ESDHC_FLAG_HS400, }; static struct esdhc_soc_data usdhc_imx8qm_data = { diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index 45ed635..12e9163 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -194,6 +194,7 @@ #define ESDHC_STROBE_DLL_CTRL_RESET BIT(1) #define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7 #define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3 +#define ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT (4 << 20) #define ESDHC_STROBE_DLL_STATUS 0x74 #define ESDHC_STROBE_DLL_STS_REF_LOCK BIT(1) |