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| author | Peng Fan <peng.fan@nxp.com> | 2019-10-16 10:24:20 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-11-03 17:04:16 +0100 |
| commit | eeca15a50aa454480d4a31ca20fd80ef620909ee (patch) | |
| tree | 970b4acee0a3c4dcef7a5bb68c35b9dddd454450 | |
| parent | 9e094455495081979cd20ac730a42508717e37b5 (diff) | |
| download | u-boot-eeca15a50aa454480d4a31ca20fd80ef620909ee.zip u-boot-eeca15a50aa454480d4a31ca20fd80ef620909ee.tar.gz u-boot-eeca15a50aa454480d4a31ca20fd80ef620909ee.tar.bz2 | |
imx8m: clock: improve irq response latency
Improve the IRQ response latency by setting GIC root clock source to
sys_pll2_200m from osc.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/mach-imx/imx8m/clock_imx8mq.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 5c3f780..0490351 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -806,6 +806,12 @@ int clock_init(void) clock_enable(CCGR_TSENSOR, 1); clock_enable(CCGR_OCOTP, 1); + /* config GIC ROOT to sys_pll2_200m */ + clock_enable(CCGR_GIC, 0); + clock_set_target_val(GIC_CLK_ROOT, + CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1)); + clock_enable(CCGR_GIC, 1); + return 0; } #endif |