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author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2021-06-29 20:53:14 +0300 |
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committer | Ramon Fried <rfried.dev@gmail.com> | 2021-07-06 05:22:41 +0300 |
commit | bec7d5342d031ddfc4558aaafc1e6e63e5652917 (patch) | |
tree | fb73e87b298a35b5824aed5822e59644424cb882 | |
parent | 9feb6366809942cfd29eeadb9b1c935d1c2dfc3f (diff) | |
download | u-boot-bec7d5342d031ddfc4558aaafc1e6e63e5652917.zip u-boot-bec7d5342d031ddfc4558aaafc1e6e63e5652917.tar.gz u-boot-bec7d5342d031ddfc4558aaafc1e6e63e5652917.tar.bz2 |
arm: dts: ls1028a: disable enetc-2 by default
The enetc-2 port is used as DSA master (connected back-to-back to
mscc_felix_port4). Since the convention is to not enable ports in the
common SoC dtsi unless they are used on the board, then enable enetc-2
only when mscc_felix_port4 itself is enabled.
All existing device trees appear to adhere to this rule, so disable
enetc-2 in the SoC dtsi.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
-rw-r--r-- | arch/arm/dts/fsl-ls1028a.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 21f4ef7..50f9b52 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -142,7 +142,7 @@ }; enetc2: pci@0,2 { reg = <0x000200 0 0 0 0>; - status = "okay"; + status = "disabled"; phy-mode = "internal"; fixed-link { |