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author | Michal Simek <michal.simek@xilinx.com> | 2017-11-02 12:41:34 +0100 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2017-11-28 16:09:16 +0100 |
commit | a41bd46c2acb9e31b02756cd3e0fc203be98e391 (patch) | |
tree | 6b0281fe9a5cf8d80fef4836359f74df4a3ac241 | |
parent | 397a08ab9294107ede59e044dcd7557fbc230cb7 (diff) | |
download | u-boot-a41bd46c2acb9e31b02756cd3e0fc203be98e391.zip u-boot-a41bd46c2acb9e31b02756cd3e0fc203be98e391.tar.gz u-boot-a41bd46c2acb9e31b02756cd3e0fc203be98e391.tar.bz2 |
arm64: zynqmp: Remove clock setting from dtsi
clock setting is handled via clk dtsi file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 2d26d0d..35cb6f2 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -1018,7 +1018,6 @@ compatible = "xlnx,zynqmp-dwc3"; reg = <0x0 0xff9d0000 0x0 0x100>; clock-names = "bus_clk", "ref_clk"; - clocks = <&clk125>, <&clk125>; #stream-id-cells = <1>; iommus = <&smmu 0x860>; power-domains = <&pd_usb0>; @@ -1045,7 +1044,6 @@ compatible = "xlnx,zynqmp-dwc3"; reg = <0x0 0xff9e0000 0x0 0x100>; clock-names = "bus_clk", "ref_clk"; - clocks = <&clk125>, <&clk125>; #stream-id-cells = <1>; iommus = <&smmu 0x861>; power-domains = <&pd_usb1>; |