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| author | Ran Wang <ran.wang_1@nxp.com> | 2017-09-04 18:46:47 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-09-11 08:01:05 -0700 |
| commit | 9a609a88004e5be73d873e229f1b61bd52c749f7 (patch) | |
| tree | d73be97b35bcb86082618e1395efb3f3eeb33dea | |
| parent | 9f244b3587c264a9bc1187c27252ee31c92968c1 (diff) | |
| download | u-boot-9a609a88004e5be73d873e229f1b61bd52c749f7.zip u-boot-9a609a88004e5be73d873e229f1b61bd52c749f7.tar.gz u-boot-9a609a88004e5be73d873e229f1b61bd52c749f7.tar.bz2 | |
armv8: Add scfg_clrsetbits_32(), scfg_clrbits_32()
Some erratum patch might need it to program registers.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index ea8aced..247f09e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -29,9 +29,13 @@ #ifdef CONFIG_SYS_FSL_CCSR_SCFG_LE #define scfg_in32(a) in_le32(a) #define scfg_out32(a, v) out_le32(a, v) +#define scfg_clrbits32(addr, clear) clrbits_le32(addr, clear) +#define scfg_clrsetbits32(addr, clear, set) clrsetbits_le32(addr, clear, set) #elif defined(CONFIG_SYS_FSL_CCSR_SCFG_BE) #define scfg_in32(a) in_be32(a) #define scfg_out32(a, v) out_be32(a, v) +#define scfg_clrbits32(addr, clear) clrbits_be32(addr, clear) +#define scfg_clrsetbits32(addr, clear, set) clrsetbits_be32(addr, clear, set) #endif #ifdef CONFIG_SYS_FSL_PEX_LUT_LE |