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authorWenyou Yang <wenyou.yang@atmel.com>2016-04-11 16:41:32 +0800
committerAndreas Bießmann <andreas@biessmann.org>2016-05-24 08:08:36 +0200
commit7a91e1a3835413aac3e7c894ca1ba205e6ade887 (patch)
tree63076814a7df1bfd5763068a16152bf4b360402d
parent4adf6a715796de4f0e858e0246c3abf5e3c118f3 (diff)
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ARM: at91: clock: complete the GCK's clock sources
Add the UPLL clock and master clock as a clock source for getting the generated clock frequency to complete its clock sources support. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
-rw-r--r--arch/arm/mach-at91/armv7/clock.c6
-rw-r--r--arch/arm/mach-at91/include/mach/clk.h2
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 27372b3..76fcada 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -236,6 +236,12 @@ u32 at91_get_periph_generated_clk(u32 id)
case AT91_PMC_PCR_GCKCSS_PLLA_CLK:
freq = gd->arch.plla_rate_hz;
break;
+ case AT91_PMC_PCR_GCKCSS_UPLL_CLK:
+ freq = AT91_UTMI_PLL_CLK_FREQ;
+ break;
+ case AT91_PMC_PCR_GCKCSS_MCK_CLK:
+ freq = gd->arch.mck_rate_hz;
+ break;
default:
printf("Improper GCK clock source selection!\n");
freq = 0;
diff --git a/arch/arm/mach-at91/include/mach/clk.h b/arch/arm/mach-at91/include/mach/clk.h
index 8577c74..ca7d7d0 100644
--- a/arch/arm/mach-at91/include/mach/clk.h
+++ b/arch/arm/mach-at91/include/mach/clk.h
@@ -20,6 +20,8 @@
#define GCK_CSS_MCK_CLK 4
#define GCK_CSS_AUDIO_CLK 5
+#define AT91_UTMI_PLL_CLK_FREQ 480000000
+
static inline unsigned long get_cpu_clk_rate(void)
{
DECLARE_GLOBAL_DATA_PTR;