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| author | Anatolij Gustschin <agust@denx.de> | 2017-08-28 21:46:26 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2017-10-12 17:30:32 +0200 |
| commit | 38df37018215215fc83463bba5bdc786813d3c1a (patch) | |
| tree | 6cf58660d192f46f6397ed127220dc299fd32935 | |
| parent | 464c988a1dd5356b84a375539d1a8d42c518a2db (diff) | |
| download | u-boot-38df37018215215fc83463bba5bdc786813d3c1a.zip u-boot-38df37018215215fc83463bba5bdc786813d3c1a.tar.gz u-boot-38df37018215215fc83463bba5bdc786813d3c1a.tar.bz2 | |
imx6: disable clock command and print_cpuinfo code in SPL
We do not use print_cpuinfo and clock command code in SPL,
disable it when building SPL image.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
| -rw-r--r-- | arch/arm/mach-imx/cpu.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mx6/clock.c | 30 |
2 files changed, 18 insertions, 16 deletions
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 1017eb8..18205dc 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -25,7 +25,7 @@ #include <fsl_esdhc.h> #endif -#if defined(CONFIG_DISPLAY_CPUINFO) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) static u32 reset_cause = -1; static char *get_reset_cause(void) @@ -132,7 +132,7 @@ unsigned imx_ddr_size(void) } #endif -#if defined(CONFIG_DISPLAY_CPUINFO) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) const char *get_imx_type(u32 imxtype) { diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 0e019c4..71a9e6b 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -1220,6 +1220,20 @@ void enable_thermal_clk(void) enable_pll3(); } +#ifdef CONFIG_MTD_NOR_FLASH +void enable_eim_clk(unsigned char enable) +{ + u32 reg; + + reg = __raw_readl(&imx_ccm->CCGR6); + if (enable) + reg |= MXC_CCM_CCGR6_EMI_SLOW_MASK; + else + reg &= ~MXC_CCM_CCGR6_EMI_SLOW_MASK; + __raw_writel(reg, &imx_ccm->CCGR6); +} +#endif + unsigned int mxc_get_clock(enum mxc_clock clk) { switch (clk) { @@ -1262,6 +1276,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return 0; } +#ifndef CONFIG_SPL_BUILD /* * Dump some core clockes. */ @@ -1463,20 +1478,6 @@ void select_ldb_di_clock_source(enum ldb_di_clock clk) } #endif -#ifdef CONFIG_MTD_NOR_FLASH -void enable_eim_clk(unsigned char enable) -{ - u32 reg; - - reg = __raw_readl(&imx_ccm->CCGR6); - if (enable) - reg |= MXC_CCM_CCGR6_EMI_SLOW_MASK; - else - reg &= ~MXC_CCM_CCGR6_EMI_SLOW_MASK; - __raw_writel(reg, &imx_ccm->CCGR6); -} -#endif - /***************************************************/ U_BOOT_CMD( @@ -1484,3 +1485,4 @@ U_BOOT_CMD( "display clocks", "" ); +#endif |