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authorWenyou Yang <wenyou.yang@atmel.com>2017-03-23 12:55:21 +0800
committerSimon Glass <sjg@chromium.org>2017-04-13 14:44:49 -0600
commit0de077df38a6a1120acf7833572d1ffc8f209f33 (patch)
tree2139d3a3bc52fce51235d4b54d4f036a165f1083
parent8c4e4101d68ca075bba641c88a398ee8ed81b07f (diff)
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mtd: nand: atmel: use another functions to set gpio value
Because there isn't the implementation of gpio_set/get_value() and gpio_set/get_value() after the at91 gpio driver is converted to support the driver model, use at91_set_gpio_value() and at91_get_gpio_value() Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--drivers/mtd/nand/atmel_nand.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 8669432..21d5d0e 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1222,7 +1222,8 @@ static void at91_nand_hwcontrol(struct mtd_info *mtd,
IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE;
#ifdef CONFIG_SYS_NAND_ENABLE_PIN
- gpio_set_value(CONFIG_SYS_NAND_ENABLE_PIN, !(ctrl & NAND_NCE));
+ at91_set_gpio_value(CONFIG_SYS_NAND_ENABLE_PIN,
+ !(ctrl & NAND_NCE));
#endif
this->IO_ADDR_W = (void *) IO_ADDR_W;
}
@@ -1234,7 +1235,7 @@ static void at91_nand_hwcontrol(struct mtd_info *mtd,
#ifdef CONFIG_SYS_NAND_READY_PIN
static int at91_nand_ready(struct mtd_info *mtd)
{
- return gpio_get_value(CONFIG_SYS_NAND_READY_PIN);
+ return at91_get_gpio_value(CONFIG_SYS_NAND_READY_PIN);
}
#endif