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| author | Neal Frager <neal.frager@amd.com> | 2023-08-31 16:27:53 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-09-21 13:20:11 +0200 |
| commit | 771635f6b0f5bc71d85beb7d994b1c66bf36f6ff (patch) | |
| tree | aee3e8ff076cdaa836d9e625432840223d86afac | |
| parent | 5528f79778473b19917fbaea41e8f6ad0f943ca5 (diff) | |
| download | u-boot-771635f6b0f5bc71d85beb7d994b1c66bf36f6ff.zip u-boot-771635f6b0f5bc71d85beb7d994b1c66bf36f6ff.tar.gz u-boot-771635f6b0f5bc71d85beb7d994b1c66bf36f6ff.tar.bz2 | |
arm64: zynqmp: Add output-enable pins to SOMs
Now that the zynqmp pinctrl driver supports the tri-state registers, make
sure that the pins requiring output-enable are configured appropriately for
SOMs.
Without it, all tristate setting for MIOs, which are not related to SOM
itself, are using default configuration which is not correct setting.
It means SDs, USBs, ethernet, etc. are not working properly.
In past it was fixed through calling tristate configuration via bootcmd:
usb_init=mw 0xFF180208 2020
kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
gpio toggle gpio@ff0a000038
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7ecd98b2a302c5c6628e0234482f23c38e721fd6.1693492064.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 6 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 6 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 |
4 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts index d318773..30a0230 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -250,6 +250,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -301,6 +302,7 @@ conf-bootstrap { pins = "MIO45", "MIO47", "MIO49"; bias-disable; + output-enable; low-power-disable; }; @@ -308,6 +310,7 @@ pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", "MIO43"; bias-disable; + output-enable; low-power-enable; }; @@ -316,6 +319,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -346,6 +350,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; @@ -373,6 +378,7 @@ pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts index 69dba07..8f4c52d 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -250,6 +250,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -301,6 +302,7 @@ conf-bootstrap { pins = "MIO45", "MIO47", "MIO49"; bias-disable; + output-enable; low-power-disable; }; @@ -308,6 +310,7 @@ pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", "MIO43"; bias-disable; + output-enable; low-power-enable; }; @@ -316,6 +319,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -346,6 +350,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; @@ -373,6 +378,7 @@ pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index a81b3f6..55bef1d 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -205,6 +205,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -256,6 +257,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -263,6 +265,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -271,6 +274,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -301,6 +305,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts index f935f25..1b1d9e7 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -193,6 +193,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -244,6 +245,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -251,6 +253,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -259,6 +262,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -289,6 +293,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; |