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author | Michal Simek <michal.simek@xilinx.com> | 2021-02-09 15:28:15 +0100 |
---|---|---|
committer | Michal Simek <michal.simek@xilinx.com> | 2021-02-23 14:56:59 +0100 |
commit | 9b7aac75365b68bae2e8f7cf074ba95638d31882 (patch) | |
tree | 9d2ee4b001275fe6a2191ead6ec3913e033a783d | |
parent | 3aba25bc382beeb8a92b46d23fd1db47dfcb1121 (diff) | |
download | u-boot-9b7aac75365b68bae2e8f7cf074ba95638d31882.zip u-boot-9b7aac75365b68bae2e8f7cf074ba95638d31882.tar.gz u-boot-9b7aac75365b68bae2e8f7cf074ba95638d31882.tar.bz2 |
clk: zynq: Add dummy clock enable function
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r-- | drivers/clk/clk_zynq.c | 10 | ||||
-rw-r--r-- | drivers/mmc/zynq_sdhci.c | 2 | ||||
-rw-r--r-- | drivers/net/zynq_gem.c | 4 | ||||
-rw-r--r-- | drivers/serial/serial_zynq.c | 2 | ||||
-rw-r--r-- | drivers/spi/zynq_qspi.c | 2 | ||||
-rw-r--r-- | drivers/spi/zynq_spi.c | 2 | ||||
-rw-r--r-- | drivers/spi/zynqmp_gqspi.c | 2 | ||||
-rw-r--r-- | drivers/watchdog/xilinx_wwdt.c | 3 |
8 files changed, 18 insertions, 9 deletions
diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c index bf32d83..1f71b7d 100644 --- a/drivers/clk/clk_zynq.c +++ b/drivers/clk/clk_zynq.c @@ -444,11 +444,21 @@ static ulong zynq_clk_get_rate(struct clk *clk) } #endif +static int dummy_enable(struct clk *clk) +{ + /* + * Add implementation but by default all clocks are enabled + * after power up which is only one supported case now. + */ + return 0; +} + static struct clk_ops zynq_clk_ops = { .get_rate = zynq_clk_get_rate, #ifndef CONFIG_SPL_BUILD .set_rate = zynq_clk_set_rate, #endif + .enable = dummy_enable, }; static int zynq_clk_probe(struct udevice *dev) diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index d9ad0ff..b79c402 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -577,7 +577,7 @@ static int arasan_sdhci_probe(struct udevice *dev) debug("%s: CLK %ld\n", __func__, clock); ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(dev, "failed to enable clock\n"); return ret; } diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 585c06d..a2a0111 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -477,13 +477,13 @@ static int zynq_gem_init(struct udevice *dev) } ret = clk_set_rate(&priv->clk, clk_rate); - if (IS_ERR_VALUE(ret) && ret != (unsigned long)-ENOSYS) { + if (IS_ERR_VALUE(ret)) { dev_err(dev, "failed to set tx clock rate\n"); return ret; } ret = clk_enable(&priv->clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(dev, "failed to enable tx clock\n"); return ret; } diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 2883e24..799d524 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -127,7 +127,7 @@ static int zynq_serial_setbrg(struct udevice *dev, int baudrate) debug("%s: CLK %ld\n", __func__, clock); ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(dev, "failed to enable clock\n"); return ret; } diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 845f2d2..29dbbf5 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -193,7 +193,7 @@ static int zynq_qspi_probe(struct udevice *bus) } ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(bus, "failed to enable clock\n"); return ret; } diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index 2971e55..650d4d7 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -143,7 +143,7 @@ static int zynq_spi_probe(struct udevice *bus) } ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(bus, "failed to enable clock\n"); return ret; } diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index c7db43a..bd25511 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -373,7 +373,7 @@ static int zynqmp_qspi_probe(struct udevice *bus) debug("%s: CLK %ld\n", __func__, clock); ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(bus, "failed to enable clock\n"); return ret; } diff --git a/drivers/watchdog/xilinx_wwdt.c b/drivers/watchdog/xilinx_wwdt.c index 9137d87..11b30ae 100644 --- a/drivers/watchdog/xilinx_wwdt.c +++ b/drivers/watchdog/xilinx_wwdt.c @@ -90,9 +90,8 @@ static int xlnx_wwdt_start(struct udevice *dev, u64 timeout, ulong flags) /* Calculate timeout count */ count = timeout * clock_f; - /* clk_enable will return -ENOSYS when it is not implemented */ ret = clk_enable(&wdt->clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(dev, "failed to enable clock\n"); return ret; } |