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| author | Sinan Akman <sinan@writeme.com> | 2020-04-04 01:16:46 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-02-21 18:45:26 -0500 |
| commit | cbc3cd02a138fcb9d6e8bf1c15bbf2468ee1fbc4 (patch) | |
| tree | c89d70b08da97a9aec761364f20221a0908531eb | |
| parent | bbc0fcc302bab4521b1b87036c791ed2e8a33ea6 (diff) | |
| download | u-boot-cbc3cd02a138fcb9d6e8bf1c15bbf2468ee1fbc4.zip u-boot-cbc3cd02a138fcb9d6e8bf1c15bbf2468ee1fbc4.tar.gz u-boot-cbc3cd02a138fcb9d6e8bf1c15bbf2468ee1fbc4.tar.bz2 | |
mpc8379erdb: Add device tree
Signed-off-by: Sinan Akman <sinan@writeme.com>
| -rw-r--r-- | arch/powerpc/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/powerpc/dts/mpc8379erdb.dts | 74 |
2 files changed, 75 insertions, 0 deletions
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index 3ecda36..ceaa8ce 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -7,6 +7,7 @@ dtb-$(CONFIG_TARGET_KMOPTI2) += kmopti2.dtb dtb-$(CONFIG_TARGET_KMSUPX5) += kmsupc5.dtb kmsupm5.dtb dtb-$(CONFIG_TARGET_KMTEGR1) += kmtegr1.dtb dtb-$(CONFIG_TARGET_KMTEPR2) += kmtepr2.dtb +dtb-$(CONFIG_TARGET_MPC837XERDB) += mpc8379erdb.dtb dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb dtb-$(CONFIG_TARGET_P1010RDB_PA) += p1010rdb-pa.dtb p1010rdb-pa_36b.dtb dtb-$(CONFIG_TARGET_P1010RDB_PB) += p1010rdb-pb.dtb p1010rdb-pb_36b.dtb diff --git a/arch/powerpc/dts/mpc8379erdb.dts b/arch/powerpc/dts/mpc8379erdb.dts new file mode 100644 index 0000000..b1881b1 --- /dev/null +++ b/arch/powerpc/dts/mpc8379erdb.dts @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * MPC8379E RDB Device Tree Source + * + * Copyright 2020 NXP + */ + +/dts-v1/; + +/ { + compatible = "fsl,mpc8379erdb"; + + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8379@0 { + device_type = "cpu"; + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; // 256MB at 0 + }; + + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,elbc", "simple-bus"; + reg = <0xe0005000 0x1000>; + interrupts = <77 0x8>; + interrupt-parent = <&ipic>; + }; + + immr@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; + + sdhc@2e000 { + compatible = "fsl,esdhc"; + reg = <0x2e000 0x1000>; + bus-width = <0x4>; + clock-frequency = <0>; + }; + + ipic: interrupt-controller@700 { + compatible = "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + device_type = "ipic"; + }; + + }; + +}; |