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| author | Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> | 2023-09-15 10:20:43 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-09-21 13:20:11 +0200 |
| commit | e31d707d8b591973560cb656d152a154993b1d74 (patch) | |
| tree | ce00d9c8a42ae71afea4c3e7658355cf8ed993f2 | |
| parent | 1ae4a07c2bac18663b2cff003b360256bbb758dc (diff) | |
| download | u-boot-e31d707d8b591973560cb656d152a154993b1d74.zip u-boot-e31d707d8b591973560cb656d152a154993b1d74.tar.gz u-boot-e31d707d8b591973560cb656d152a154993b1d74.tar.bz2 | |
net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge
Current code expects bridge phy address at 0 which is not correct
expectation because bridge phy address is configurable.
That's why update the code to read reg property to figure it out
where bridge is and use it in phy creation code.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230915045043.4167628-1-tejas.arvind.bhumkar@amd.com
| -rw-r--r-- | drivers/net/phy/phy.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index d50fd50..63b3e46 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -807,7 +807,10 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus, ofnode_for_each_subnode(node, dev_ofnode(dev)) { node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0"); if (ofnode_valid(node)) { - phydev = phy_device_create(bus, 0, + int gmiirgmii_phyaddr; + + gmiirgmii_phyaddr = ofnode_read_u32_default(node, "reg", 0); + phydev = phy_device_create(bus, gmiirgmii_phyaddr, PHY_GMII2RGMII_ID, false); if (phydev) phydev->node = node; |