Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into nextWIP/20Sep2022-next

- Enable CONFIG_TIMER for all Kirkwood / MVEBU boards (Stefan)
- u-boot-spl.kwb/SPL: Add / improve size limit setup / detection (Pali)
- mvebu: theadorable: Misc updates in defconfig und dts (Stefan)

14 files changed, 137 insertions, 39 deletions

diff --git a/Makefile b/Makefile
index b421296..c80b321 100644
--- a/Makefile
+++ b/Makefile
@@ -1474,6 +1474,7 @@ endif
 
 u-boot-spl.kwb: u-boot.bin spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)
+	$(BOARD_SIZE_CHECK)
 
 u-boot.sha1:	u-boot.bin
 		tools/ubsha1 u-boot.bin
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f3a3c0f..9a6c2e8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -627,6 +627,7 @@ config ARCH_KIRKWOOD
 	select BOARD_EARLY_INIT_F
 	select CPU_ARM926EJS
 	select GPIO_EXTRA_HEADER
+	select TIMER
 
 config ARCH_MVEBU
 	bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
@@ -638,6 +639,8 @@ config ARCH_MVEBU
 	select GPIO_EXTRA_HEADER
 	select SPL_DM_SPI if SPL
 	select SPL_DM_SPI_FLASH if SPL
+	select SPL_TIMER if SPL
+	select TIMER
 	select OF_CONTROL
 	select OF_SEPARATE
 	select SPI
@@ -648,6 +651,7 @@ config ARCH_ORION5X
 	select CPU_ARM926EJS
 	select GPIO_EXTRA_HEADER
 	select SPL_SEPARATE_BSS if SPL
+	select TIMER
 
 config TARGET_STV0991
 	bool "Support stv0991"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7c40714..5a42d50 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -233,8 +233,11 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra210-p3450-0000.dtb
 
 ifdef CONFIG_ARMADA_32BIT
+ifdef CONFIG_ARMADA_375
+dtb-$(CONFIG_ARCH_MVEBU) +=			\
+	armada-375-db.dtb
+else
 dtb-$(CONFIG_ARCH_MVEBU) +=			\
-	armada-375-db.dtb			\
 	armada-385-atl-x530.dtb			\
 	armada-385-atl-x530DP.dtb		\
 	armada-385-db-88f6820-amc.dtb		\
@@ -254,6 +257,7 @@ dtb-$(CONFIG_ARCH_MVEBU) +=			\
 	armada-xp-maxbcm.dtb			\
 	armada-xp-synology-ds414.dtb		\
 	armada-xp-theadorable.dtb
+endif
 else
 dtb-$(CONFIG_ARCH_MVEBU) +=			\
 	armada-3720-db.dtb			\
diff --git a/arch/arm/dts/armada-375.dtsi b/arch/arm/dts/armada-375.dtsi
index 20a8c35..a044b3f 100644
--- a/arch/arm/dts/armada-375.dtsi
+++ b/arch/arm/dts/armada-375.dtsi
@@ -187,7 +187,7 @@
 				reg = <0xc000 0x58>;
 			};
 
-			timer@c600 {
+			timer0: timer@c600 {
 				compatible = "arm,cortex-a9-twd-timer";
 				reg = <0xc600 0x20>;
 				interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
@@ -416,7 +416,7 @@
 				interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 			};
 
-			timer@20300 {
+			timer1: timer@20300 {
 				compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
 				reg = <0x20300 0x30>, <0x21040 0x30>;
 				interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts
index ba73386..7d83364 100644
--- a/arch/arm/dts/armada-xp-theadorable.dts
+++ b/arch/arm/dts/armada-xp-theadorable.dts
@@ -107,20 +107,6 @@
 				status = "okay";
 			};
 
-			mdio {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				phy0: ethernet-phy@0 {
-					reg = <0>;
-				};
-			};
-
-			ethernet@70000 {
-				status = "okay";
-				phy = <&phy0>;
-				phy-mode = "sgmii";
-			};
-
 			usb@50000 {
 				status = "okay";
 			};
@@ -166,6 +152,18 @@
 	clock-frequency = <100000>;
 };
 
+&mdio {
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
+
+&eth0 {
+	status = "okay";
+	phy = <&phy0>;
+	phy-mode = "sgmii";
+};
+
 &spi0 {
 	status = "okay";
 
@@ -198,7 +196,6 @@
 	};
 };
 
-
 &pciec {
 	status = "okay";
 
diff --git a/arch/arm/dts/mvebu-u-boot.dtsi b/arch/arm/dts/mvebu-u-boot.dtsi
index 5538f95..db4bf39 100644
--- a/arch/arm/dts/mvebu-u-boot.dtsi
+++ b/arch/arm/dts/mvebu-u-boot.dtsi
@@ -15,6 +15,17 @@
 	u-boot,dm-pre-reloc;
 };
 
+#ifdef CONFIG_ARMADA_375
+/* Armada 375 has multiple timers, use timer1 here */
+&timer1 {
+	u-boot,dm-pre-reloc;
+};
+#else
+&timer {
+	u-boot,dm-pre-reloc;
+};
+#endif
+
 #ifdef CONFIG_SPL_SPI
 &spi0 {
 	u-boot,dm-pre-reloc;
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index 0bba0a4..2e06f2b 100644
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -39,9 +39,4 @@
 #endif
 #endif
 
-/* Use common timer */
-#define CONFIG_SYS_TIMER_COUNTS_DOWN
-#define CONFIG_SYS_TIMER_COUNTER	(MVEBU_TIMER_BASE + 0x14)
-#define CONFIG_SYS_TIMER_RATE		25000000
-
 #endif /* __MVEBU_CONFIG_H */
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index e1b2a42..f2422d2 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -40,6 +40,7 @@ config SPL_SIZE_LIMIT
 	hex "Maximum size of SPL image"
 	default 0x11000 if ARCH_MX6 && !MX6_OCRAM_256KB
 	default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
+	default 0x30000 if ARCH_MVEBU && ARMADA_32BIT
 	default 0x0
 	help
 	  Specifies the maximum length of the U-Boot SPL image.
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index cfccfdc..441cd8e 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -70,7 +70,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_KIRKWOOD_SPI=y
-CONFIG_TIMER=y
-CONFIG_ORION_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 1945b72..f350f8f 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -71,7 +71,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_KIRKWOOD_SPI=y
-CONFIG_TIMER=y
-CONFIG_ORION_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 9074ca1..3d84bf9 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -22,6 +22,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_FIT=y
+# CONFIG_FIT_PRINT is not set
 CONFIG_BOOTDELAY=3
 CONFIG_USE_PREBOOT=y
 # CONFIG_CONSOLE_MUX is not set
@@ -98,3 +99,5 @@ CONFIG_VIDEO_MVEBU=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
+CONFIG_FAT_WRITE=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index ba635fe..6698f23 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -28,6 +28,8 @@ CONFIG_SYS_MEMTEST_END=0x00ffffff
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
+CONFIG_HAS_BOARD_SIZE_LIMIT=y
+CONFIG_BOARD_SIZE_LIMIT=983040
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 1b49236..fd8745f 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -203,8 +203,11 @@ config OMAP_TIMER
 config ORION_TIMER
 	bool "Orion timer support"
 	depends on TIMER
+	default y if ARCH_KIRKWOOD || (ARCH_MVEBU && ARMADA_32BIT)
+	select TIMER_EARLY if ARCH_MVEBU
 	help
-	  Select this to enable an timer for Orion devices.
+	  Select this to enable an timer for Orion and Armada devices
+	  like Armada XP etc.
 
 config RISCV_TIMER
 	bool "RISC-V timer support"
diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c
index d7d1a1b..cd63ea9 100644
--- a/drivers/timer/orion-timer.c
+++ b/drivers/timer/orion-timer.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 #include <asm/io.h>
 #include <common.h>
+#include <div64.h>
 #include <dm/device.h>
 #include <dm/fdtaddr.h>
 #include <timer.h>
@@ -11,20 +12,100 @@
 #define TIMER0_RELOAD		0x10
 #define TIMER0_VAL		0x14
 
+enum input_clock_type {
+	INPUT_CLOCK_NON_FIXED,
+	INPUT_CLOCK_25MHZ,	/* input clock rate is fixed to 25MHz */
+};
+
 struct orion_timer_priv {
 	void *base;
 };
 
-static uint64_t orion_timer_get_count(struct udevice *dev)
+#define MVEBU_TIMER_FIXED_RATE_25MHZ	25000000
+
+static bool early_init_done __section(".data") = false;
+
+/* Common functions for early (boot) and DM based timer */
+static void orion_timer_init(void *base, enum input_clock_type type)
+{
+	writel(~0, base + TIMER0_VAL);
+	writel(~0, base + TIMER0_RELOAD);
+
+	if (type == INPUT_CLOCK_25MHZ) {
+		/*
+		 * On Armada XP / 38x ..., the 25MHz clock source needs to
+		 * be enabled
+		 */
+		setbits_le32(base + TIMER_CTRL, BIT(11));
+	}
+
+	/* enable timer */
+	setbits_le32(base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN);
+}
+
+static uint64_t orion_timer_get_count(void *base)
+{
+	return timer_conv_64(~readl(base + TIMER0_VAL));
+}
+
+/* Early (e.g. bootstage etc) timer functions */
+static void notrace timer_early_init(void)
+{
+	/* Only init the timer once */
+	if (early_init_done)
+		return;
+	early_init_done = true;
+
+	if (IS_ENABLED(CONFIG_ARCH_MVEBU))
+		orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_25MHZ);
+	else
+		orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_NON_FIXED);
+}
+
+/**
+ * timer_early_get_rate() - Get the timer rate before driver model
+ */
+unsigned long notrace timer_early_get_rate(void)
+{
+	timer_early_init();
+
+	if (IS_ENABLED(CONFIG_ARCH_MVEBU))
+		return MVEBU_TIMER_FIXED_RATE_25MHZ;
+	else
+		return CONFIG_SYS_TCLK;
+}
+
+/**
+ * timer_early_get_count() - Get the timer count before driver model
+ *
+ */
+u64 notrace timer_early_get_count(void)
+{
+	timer_early_init();
+
+	return orion_timer_get_count((void *)MVEBU_TIMER_BASE);
+}
+
+ulong timer_get_boot_us(void)
+{
+	u64 ticks;
+
+	ticks = timer_early_get_count();
+	return lldiv(ticks * 1000, timer_early_get_rate());
+}
+
+/* DM timer functions */
+static uint64_t dm_orion_timer_get_count(struct udevice *dev)
 {
 	struct orion_timer_priv *priv = dev_get_priv(dev);
 
-	return timer_conv_64(~readl(priv->base + TIMER0_VAL));
+	return orion_timer_get_count(priv->base);
 }
 
 static int orion_timer_probe(struct udevice *dev)
 {
 	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	enum input_clock_type type = dev_get_driver_data(dev);
 	struct orion_timer_priv *priv = dev_get_priv(dev);
 
 	priv->base = devfdt_remap_addr_index(dev, 0);
@@ -33,23 +114,23 @@ static int orion_timer_probe(struct udevice *dev)
 		return -ENOMEM;
 	}
 
-	uc_priv->clock_rate = CONFIG_SYS_TCLK;
-
-	writel(~0, priv->base + TIMER0_VAL);
-	writel(~0, priv->base + TIMER0_RELOAD);
-
-	/* enable timer */
-	setbits_le32(priv->base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN);
+	if (type == INPUT_CLOCK_25MHZ)
+		uc_priv->clock_rate = MVEBU_TIMER_FIXED_RATE_25MHZ;
+	else
+		uc_priv->clock_rate = CONFIG_SYS_TCLK;
+	orion_timer_init(priv->base, type);
 
 	return 0;
 }
 
 static const struct timer_ops orion_timer_ops = {
-	.get_count = orion_timer_get_count,
+	.get_count = dm_orion_timer_get_count,
 };
 
 static const struct udevice_id orion_timer_ids[] = {
-	{ .compatible = "marvell,orion-timer" },
+	{ .compatible = "marvell,orion-timer", .data = INPUT_CLOCK_NON_FIXED },
+	{ .compatible = "marvell,armada-370-timer", .data = INPUT_CLOCK_25MHZ },
+	{ .compatible = "marvell,armada-xp-timer", .data = INPUT_CLOCK_25MHZ },
 	{}
 };