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authorStefan Roese <sr@denx.de>2020-08-05 15:07:30 +0200
committerStefan Roese <sr@denx.de>2020-10-16 13:55:04 +0200
commit8a35094faa6a545a5abec5ef1708dea4b3b03b26 (patch)
tree558c1e152280bc26d515b8119f95b263dcd8a9dc
parent9dc6aef8c963ae17e1263b89c692792fce0c7198 (diff)
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spi: octeon_spi: Use a fixed 100MHz input clock on Octeon TX2
Octeon TX2 sets the TB100_EN bit in the config register. We need to use a fixed 100MHz clock for this as well to work properly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Jagan Teki <jagan@amarulasolutions.com>
-rw-r--r--drivers/spi/octeon_spi.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c
index 83fe633..7e88e55 100644
--- a/drivers/spi/octeon_spi.c
+++ b/drivers/spi/octeon_spi.c
@@ -519,7 +519,10 @@ static int octeon_spi_set_speed(struct udevice *bus, uint max_hz)
if (max_hz > OCTEON_SPI_MAX_CLOCK_HZ)
max_hz = OCTEON_SPI_MAX_CLOCK_HZ;
- clk_rate = clk_get_rate(&priv->clk);
+ if (device_is_compatible(bus, "cavium,thunderx-spi"))
+ clk_rate = 100000000;
+ else
+ clk_rate = clk_get_rate(&priv->clk);
if (IS_ERR_VALUE(clk_rate))
return -EINVAL;