diff options
author | Samuel Holland <samuel@sholland.org> | 2022-11-17 22:22:27 -0600 |
---|---|---|
committer | Andre Przywara <andre.przywara@arm.com> | 2022-12-13 20:33:37 +0000 |
commit | 6cad8bea4f6daa9ee268bbf6f88ae35735692cb0 (patch) | |
tree | 49045558ef7c6be9c907dfc6566d3d70a9917134 | |
parent | b072aefbbe1cbbeab92c8153c07127051905d292 (diff) | |
download | u-boot-6cad8bea4f6daa9ee268bbf6f88ae35735692cb0.zip u-boot-6cad8bea4f6daa9ee268bbf6f88ae35735692cb0.tar.gz u-boot-6cad8bea4f6daa9ee268bbf6f88ae35735692cb0.tar.bz2 |
pinctrl: sunxi: Add P2WI and RSB pinmuxes
P2WI and RSB are used to communicate with a PMIC. Most SoCs have only
one possible pinmux. F1C100s has two possibilities, with different mux
values, so omit it until some board needs one of them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sunxi.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 061104b..c4fbda7 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -338,6 +338,7 @@ static const struct sunxi_pinctrl_function sun6i_a31_r_pinctrl_functions[] = { { "gpio_in", 0 }, { "gpio_out", 1 }, { "s_i2c", 2 }, /* PL0-PL1 */ + { "s_p2wi", 3 }, /* PL0-PL1 */ { "s_uart", 2 }, /* PL2-PL3 */ }; @@ -404,6 +405,7 @@ static const struct sunxi_pinctrl_function sun8i_a23_r_pinctrl_functions[] = { { "gpio_in", 0 }, { "gpio_out", 1 }, { "s_i2c", 3 }, /* PL0-PL1 */ + { "s_rsb", 2 }, /* PL0-PL1 */ { "s_uart", 2 }, /* PL2-PL3 */ }; @@ -469,6 +471,7 @@ static const struct sunxi_pinctrl_function sun8i_a83t_r_pinctrl_functions[] = { { "gpio_in", 0 }, { "gpio_out", 1 }, { "s_i2c", 2 }, /* PL8-PL9 */ + { "s_rsb", 2 }, /* PL0-PL1 */ { "s_uart", 2 }, /* PL2-PL3 */ }; @@ -574,6 +577,7 @@ static const struct sunxi_pinctrl_function sun9i_a80_r_pinctrl_functions[] = { { "gpio_out", 1 }, { "s_i2c0", 2 }, /* PN0-PN1 */ { "s_i2c1", 3 }, /* PM8-PM9 */ + { "s_rsb", 3 }, /* PN0-PN1 */ { "s_uart", 3 }, /* PL0-PL1 */ }; @@ -615,6 +619,7 @@ static const struct sunxi_pinctrl_function sun50i_a64_r_pinctrl_functions[] = { { "gpio_in", 0 }, { "gpio_out", 1 }, { "s_i2c", 2 }, /* PL8-PL9 */ + { "s_rsb", 2 }, /* PL0-PL1 */ { "s_uart", 2 }, /* PL2-PL3 */ }; @@ -680,6 +685,7 @@ static const struct sunxi_pinctrl_function sun50i_h6_r_pinctrl_functions[] = { { "gpio_in", 0 }, { "gpio_out", 1 }, { "s_i2c", 3 }, /* PL0-PL1 */ + { "s_rsb", 2 }, /* PL0-PL1 */ { "s_uart", 2 }, /* PL2-PL3 */ }; @@ -717,6 +723,7 @@ static const struct sunxi_pinctrl_function sun50i_h616_r_pinctrl_functions[] = { { "gpio_in", 0 }, { "gpio_out", 1 }, { "s_i2c", 3 }, /* PL0-PL1 */ + { "s_rsb", 2 }, /* PL0-PL1 */ { "s_uart", 2 }, /* PL2-PL3 */ }; |