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| author | Sean Anderson <seanga2@gmail.com> | 2020-10-16 18:57:48 -0400 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2020-12-18 16:16:37 +0530 |
| commit | 934beab88248fa8e9a07f2f046427006156dca97 (patch) | |
| tree | fe83bfa7656af02c0619693b99c3cd2ff0cb8ef1 | |
| parent | 3004034989ac6d4752c384a5c74a69f37b8ce9d1 (diff) | |
| download | u-boot-934beab88248fa8e9a07f2f046427006156dca97.zip u-boot-934beab88248fa8e9a07f2f046427006156dca97.tar.gz u-boot-934beab88248fa8e9a07f2f046427006156dca97.tar.bz2 | |
spi: dw: Remove spi_enable_chip
This function does nothing but wrap dw_write.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| -rw-r--r-- | drivers/spi/designware_spi.c | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 8abcdde..89a8266 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -171,17 +171,12 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus) return request_gpio_cs(bus); } -static inline void spi_enable_chip(struct dw_spi_priv *priv, int enable) -{ - dw_write(priv, DW_SPI_SSIENR, (enable ? 1 : 0)); -} - /* Restart the controller, disable all interrupts, clean rx fifo */ static void spi_hw_init(struct udevice *bus, struct dw_spi_priv *priv) { - spi_enable_chip(priv, 0); + dw_write(priv, DW_SPI_SSIENR, 0); dw_write(priv, DW_SPI_IMR, 0xff); - spi_enable_chip(priv, 1); + dw_write(priv, DW_SPI_SSIENR, 1); /* * Try to detect the FIFO depth if not set by interface driver, @@ -438,7 +433,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen, priv->rx_end = priv->rx + priv->len; /* Disable controller before writing control registers */ - spi_enable_chip(priv, 0); + dw_write(priv, DW_SPI_SSIENR, 0); dev_dbg(dev, "cr0=%08x rx=%p tx=%p len=%d [bytes]\n", cr0, rx, tx, priv->len); @@ -455,7 +450,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen, dw_write(priv, DW_SPI_SER, 1 << cs); /* Enable controller after writing control registers */ - spi_enable_chip(priv, 1); + dw_write(priv, DW_SPI_SSIENR, 1); /* Start transfer in a polling loop */ ret = poll_transfer(priv); @@ -490,7 +485,7 @@ static int dw_spi_set_speed(struct udevice *bus, uint speed) speed = plat->frequency; /* Disable controller before writing control registers */ - spi_enable_chip(priv, 0); + dw_write(priv, DW_SPI_SSIENR, 0); /* clk_div doesn't support odd number */ clk_div = priv->bus_clk_rate / speed; @@ -498,7 +493,7 @@ static int dw_spi_set_speed(struct udevice *bus, uint speed) dw_write(priv, DW_SPI_BAUDR, clk_div); /* Enable controller after writing control registers */ - spi_enable_chip(priv, 1); + dw_write(priv, DW_SPI_SSIENR, 1); priv->freq = speed; dev_dbg(bus, "speed=%d clk_div=%d\n", priv->freq, clk_div); |