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author | Alice Guo <alice.guo@nxp.com> | 2022-07-26 16:41:00 +0800 |
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committer | Stefano Babic <sbabic@denx.de> | 2022-07-26 11:29:01 +0200 |
commit | 5e2612f1dc8e8e239454eb95babd8fb57825f608 (patch) | |
tree | a698b68d0c4e484cc1900c9376c9307c74c774f7 | |
parent | 31b3ca5527dce8eed136b0dc30026cb24fac6eb1 (diff) | |
download | u-boot-5e2612f1dc8e8e239454eb95babd8fb57825f608.zip u-boot-5e2612f1dc8e8e239454eb95babd8fb57825f608.tar.gz u-boot-5e2612f1dc8e8e239454eb95babd8fb57825f608.tar.bz2 |
misc: fuse: update the code for accessing fuse of i.MX93
Sentinel have read access of OTP shadow register 0-511, and fsb have
read access of shadow 0-51/312-511.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
-rw-r--r-- | drivers/misc/sentinel/fuse.c | 86 |
1 files changed, 74 insertions, 12 deletions
diff --git a/drivers/misc/sentinel/fuse.c b/drivers/misc/sentinel/fuse.c index abb4c07..e2b6875 100644 --- a/drivers/misc/sentinel/fuse.c +++ b/drivers/misc/sentinel/fuse.c @@ -75,22 +75,44 @@ struct fsb_map_entry fsb_mapping_table[] = { { 0, 8 }, { 1, 8 }, { 2, 8 }, - { -1, 8 }, + { 3, 8 }, { 4, 8 }, { 5, 8 }, - { 6, 8 }, /* UID */ - { -1, 8 }, - { 8, 8 }, - { 9, 8 }, - { 10, 8 }, + { 6, 4 }, + { -1, 260 }, + { 39, 8 }, + { 40, 8 }, + { 41, 8 }, + { 42, 8 }, + { 43, 8 }, + { 44, 8 }, + { 45, 8 }, + { 46, 8 }, + { 47, 8 }, + { 48, 8 }, + { 49, 8 }, + { 50, 8 }, + { 51, 8 }, + { 52, 8 }, + { 53, 8 }, + { 54, 8 }, + { 55, 8 }, + { 56, 8 }, + { 57, 8 }, + { 58, 8 }, + { 59, 8 }, + { 60, 8 }, + { 61, 8 }, + { 62, 8 }, + { 63, 8 }, }; struct s400_map_entry s400_api_mapping_table[] = { - { 3, 11 }, /* 24 .. 34 */ - { 7, 8 }, - { 16, 11 }, /* 128 .. 143 */ - { 22, 8 }, - { 23, 8 }, + { 7, 1, 7, 63 }, + { 16, 8, }, + { 17, 8, }, + { 22, 1, 6 }, + { 23, 1, 4 }, }; #endif @@ -102,7 +124,8 @@ static s32 map_fsb_fuse_index(u32 bank, u32 word, bool *redundancy) /* map the fuse from ocotp fuse map to FSB*/ for (i = 0; i < size; i++) { if (fsb_mapping_table[i].fuse_bank != -1 && - fsb_mapping_table[i].fuse_bank == bank) { + fsb_mapping_table[i].fuse_bank == bank && + fsb_mapping_table[i].fuse_words > word) { break; } @@ -146,6 +169,7 @@ static s32 map_s400_fuse_index(u32 bank, u32 word) return s400_api_mapping_table[i].fuse_bank * 8 + word; } +#if defined(CONFIG_IMX8ULP) int fuse_sense(u32 bank, u32 word, u32 *val) { s32 word_index; @@ -198,6 +222,44 @@ int fuse_sense(u32 bank, u32 word, u32 *val) return -ENOENT; } +#elif defined(CONFIG_ARCH_IMX9) +int fuse_sense(u32 bank, u32 word, u32 *val) +{ + s32 word_index; + bool redundancy; + + if (bank >= FUSE_BANKS || word >= WORDS_PER_BANKS || !val) + return -EINVAL; + + word_index = map_fsb_fuse_index(bank, word, &redundancy); + if (word_index >= 0) { + *val = readl((ulong)FSB_BASE_ADDR + FSB_OTP_SHADOW + (word_index << 2)); + if (redundancy) + *val = (*val >> ((word % 2) * 16)) & 0xFFFF; + + return 0; + } + + word_index = map_s400_fuse_index(bank, word); + if (word_index >= 0) { + u32 data; + u32 res, size = 1; + int ret; + + ret = ahab_read_common_fuse(word_index, &data, size, &res); + if (ret) { + printf("ahab read fuse failed %d, 0x%x\n", ret, res); + return ret; + } + + *val = data; + + return 0; + } + + return -ENOENT; +} +#endif int fuse_read(u32 bank, u32 word, u32 *val) { |