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| author | Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> | 2022-07-15 19:31:19 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2022-07-26 09:34:21 +0200 |
| commit | 2a75bc1303b34e88745fcecfeacbe94f2a4bd1e2 (patch) | |
| tree | 852732e3a6aed34836e1e6650eda62cbbe02eeb2 | |
| parent | bc4795850bdd971fe7ff5014a9283b975368da95 (diff) | |
| download | u-boot-2a75bc1303b34e88745fcecfeacbe94f2a4bd1e2.zip u-boot-2a75bc1303b34e88745fcecfeacbe94f2a4bd1e2.tar.gz u-boot-2a75bc1303b34e88745fcecfeacbe94f2a4bd1e2.tar.bz2 | |
spi: zynq_qspi: Fix programming qspi speed
When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
| -rw-r--r-- | drivers/spi/zynq_qspi.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 52db7b3..00e3ffc 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -622,15 +622,12 @@ static int zynq_qspi_set_speed(struct udevice *bus, uint speed) uint32_t confr; u8 baud_rate_val = 0; - if (speed > plat->frequency) - speed = plat->frequency; + if (!speed || speed > priv->max_hz) + speed = priv->max_hz; /* Set the clock frequency */ confr = readl(®s->cr); - if (speed == 0) { - /* Set baudrate x8, if the freq is 0 */ - baud_rate_val = 0x2; - } else if (plat->speed_hz != speed) { + if (plat->speed_hz != speed) { while ((baud_rate_val < ZYNQ_QSPI_CR_BAUD_MAX) && ((plat->frequency / (2 << baud_rate_val)) > speed)) |