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authorMoritz Fischer <moritzf@google.com>2023-12-17 00:52:09 +0000
committerTom Rini <trini@konsulko.com>2023-12-21 11:59:49 -0500
commit6f21f31ff3a13b1ba0fe180cfe113b6eba4e9e98 (patch)
tree253208ed4e1a1090671425eb03f0b2975a8a9b02
parente7cc96e18c6fe5936fd9dfbdbb95049a78219cae (diff)
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pci: Enable dm_pci_map_bar() for 64-bit BARsWIP/2023-12-21-assorted-updates-and-fixes
Allow dm_pci_map_bar() usage on systems with CONFIG_SYS_PCI_64BIT. Reviewed-by: Philip Oberfichtner <pro@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Moritz Fischer <moritzf@google.com>
-rw-r--r--drivers/pci/pci-uclass.c11
-rw-r--r--include/pci.h4
2 files changed, 13 insertions, 2 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index e0d01f6..82308c7 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1611,6 +1611,17 @@ void *dm_pci_map_bar(struct udevice *dev, int bar, size_t offset, size_t len,
dm_pci_read_config32(udev, bar, &bar_response);
pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
+ /*
+ * This assumes that dm_pciauto_setup_device() will allocate
+ * a 64-bit address if CONFIG_SYS_PCI_64BIT is enabled and
+ * the device advertises that it supports it.
+ */
+ if (IS_ENABLED(CONFIG_SYS_PCI_64BIT) &&
+ (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
+ dm_pci_read_config32(udev, bar + 4, &bar_response);
+ pci_bus_addr |= (pci_addr_t)bar_response << 32;
+ }
+
if (~((pci_addr_t)0) - pci_bus_addr < offset)
return NULL;
diff --git a/include/pci.h b/include/pci.h
index 2f5eb30..0d1ac7b 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -1350,8 +1350,8 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, size_t len,
*
* Looks up a base address register and finds the physical memory address
* that corresponds to it.
- * Can be used for 32b BARs 0-5 on type 0 functions and for 32b BARs 0-1 on
- * type 1 functions.
+ * Can be used for 32b/64b BARs 0-5 on type 0 functions and for 32b BARs 0-1
+ * on type 1 functions.
* Can also be used on type 0 functions that support Enhanced Allocation for
* 32b/64b BARs. Note that duplicate BEI entries are not supported.
*