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| author | Patrice Chotard <patrice.chotard@foss.st.com> | 2023-05-31 08:01:31 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2023-06-16 11:29:29 +0200 |
| commit | 8ab9e8ffdf0977ce5101a4d71b75655667eced5e (patch) | |
| tree | 0ed7b0423702ff30457c3280f926f846f5ebb5ae | |
| parent | b4dbc5d65a67456db9cfe874d123e1c87860301d (diff) | |
| download | u-boot-8ab9e8ffdf0977ce5101a4d71b75655667eced5e.zip u-boot-8ab9e8ffdf0977ce5101a4d71b75655667eced5e.tar.gz u-boot-8ab9e8ffdf0977ce5101a4d71b75655667eced5e.tar.bz2 | |
serial: stm32: BRR must be set only when usart is disable
To avoid spurious chars, BRR register must only be written when
USART is disabled.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| -rw-r--r-- | drivers/serial/serial_stm32.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 93f7094..0085113 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -29,6 +29,10 @@ static void _stm32_serial_setbrg(fdt_addr_t base, { bool stm32f4 = uart_info->stm32f4; u32 int_div, mantissa, fraction, oversampling; + u8 uart_enable_bit = uart_info->uart_enable_bit; + + /* BRR register must be set when uart is disabled */ + clrbits_le32(base + CR1_OFFSET(stm32f4), BIT(uart_enable_bit)); int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate); @@ -44,6 +48,8 @@ static void _stm32_serial_setbrg(fdt_addr_t base, fraction = int_div % oversampling; writel(mantissa | fraction, base + BRR_OFFSET(stm32f4)); + + setbits_le32(base + CR1_OFFSET(stm32f4), BIT(uart_enable_bit)); } static int stm32_serial_setbrg(struct udevice *dev, int baudrate) |