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| author | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2023-04-27 15:36:35 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2023-06-16 11:16:31 +0200 |
| commit | 2df7fc082417cee29bde84ab93ff6a7c71aeaf35 (patch) | |
| tree | c89b8b6739ed41394e2a8122301b42f6265ece6f | |
| parent | 7b802e1acfc3a47e889afe22bdf47d1e52287cbe (diff) | |
| download | u-boot-2df7fc082417cee29bde84ab93ff6a7c71aeaf35.zip u-boot-2df7fc082417cee29bde84ab93ff6a7c71aeaf35.tar.gz u-boot-2df7fc082417cee29bde84ab93ff6a7c71aeaf35.tar.bz2 | |
configs: stm32mp1: reduce DDR_CACHEABLE_SIZE to supported 256MB DDR
Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
before relocation, to support DDR with only 256MB because the OP-TEE
reserved memory is located at end of the DDR.
By default the new size of 128MB cacheable memory is enough
in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
and is correct for DDR size = 256MB.
After relocation the real size of DDR, excluding the no-map reserved
memory, is used after the U-Boot device tree parsing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| -rw-r--r-- | configs/stm32mp13_defconfig | 2 | ||||
| -rw-r--r-- | configs/stm32mp15_defconfig | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index 5e9abc5..82b6274 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -7,7 +7,7 @@ CONFIG_ENV_OFFSET=0x900000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_STM32MP13x=y -CONFIG_DDR_CACHEABLE_SIZE=0x10000000 +CONFIG_DDR_CACHEABLE_SIZE=0x8000000 CONFIG_CMD_STM32KEY=y CONFIG_TARGET_ST_STM32MP13x=y CONFIG_ENV_OFFSET_REDUND=0x940000 diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 12b9b54..2700b5c 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -7,7 +7,7 @@ CONFIG_ENV_OFFSET=0x900000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_SYS_PROMPT="STM32MP> " -CONFIG_DDR_CACHEABLE_SIZE=0x10000000 +CONFIG_DDR_CACHEABLE_SIZE=0x8000000 CONFIG_CMD_STM32KEY=y CONFIG_TYPEC_STUSB160X=y CONFIG_TARGET_ST_STM32MP15x=y |