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| author | Tom Rini <trini@konsulko.com> | 2022-06-15 12:03:54 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-07-05 17:03:01 -0400 |
| commit | bca4509d575912e0521ce8448d41aabfc1c5e964 (patch) | |
| tree | 0ebef1c309360d9b5e1ef6046c05cc273df2b06c | |
| parent | 1f7e2fc324e414f28e9a6984f53a91da8ed8e64b (diff) | |
| download | u-boot-bca4509d575912e0521ce8448d41aabfc1c5e964.zip u-boot-bca4509d575912e0521ce8448d41aabfc1c5e964.tar.gz u-boot-bca4509d575912e0521ce8448d41aabfc1c5e964.tar.bz2 | |
Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_SPD_BUS_NUM
Signed-off-by: Tom Rini <trini@konsulko.com>
75 files changed, 52 insertions, 38 deletions
@@ -1302,11 +1302,6 @@ The following options need to be configured: will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 - CONFIG_SYS_SPD_BUS_NUM - - If defined, then this indicates the I2C bus number for DDR SPD. - If not defined, then U-Boot assumes that SPD is on I2C bus 0. - CONFIG_SYS_RTC_BUS_NUM If defined, then this indicates the I2C bus number for the RTC. diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index dfedc1f..a57da3e 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index fb71365..14f322f 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 3623190..ba9c8a0 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index ad30bbb..5948f69 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 3e52bba..ef7cc29 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -79,6 +79,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 6770981..2fe5b61 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -46,6 +46,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index c7b6008..573f799 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -68,6 +68,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 68c7bcc..086c34d 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -71,6 +71,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 84e8f65..850a974 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 427073a..9ae7350 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -48,6 +48,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 81231e1..e26ffa2 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 9313a52..1f3adaa 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 2534a2e..b5d0017 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 44f91fb..5118e83 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index dba240c..1c8ebac 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 800d094..8354163 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 7d695af..4def5dc 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -78,6 +78,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 11894a1..87f4bf2 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -68,6 +68,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 86f41ca..f5332ea 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index de5b326..d6af6a8 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -47,6 +47,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 54b78e8..2301d62 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -77,6 +77,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 70a7569..87fb78c 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -67,6 +67,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 5c58c4a..65de103 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 247d28a..4c3751e 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -46,6 +46,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index fb5d582..9164276 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 98661bf..74d1235 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index b25b8da..11c9e11 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 92ae634..d38c3e0 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -49,6 +49,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 00d5afa..459da47 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 3cc100a..3bc28d9 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 0a61313..6158455 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 8804c7b..8b52134 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -51,6 +51,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 9a42388..117382f 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 1cd2da1..9c101e9 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 361b436..4216eec 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index b070cb0..e15213a 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -50,6 +50,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 6da4e06..9cf139f 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 8288962..223cd17 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index ea2e1eb..ed0f7a1 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -50,6 +50,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 6277952..0a3937a 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -45,6 +45,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 867f8aa..e87d506 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -47,6 +47,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 59984c9..4b17f36 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -49,6 +49,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 2733bb2..5d6ffc5 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index e7f9755..dafb3ac 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -49,6 +49,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 32c1065..083b2b3 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 054f43e..270c554 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -50,6 +50,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 44abf8f..6ae3f7b 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -45,6 +45,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig index eec9d48..738b788 100644 --- a/drivers/ddr/Kconfig +++ b/drivers/ddr/Kconfig @@ -30,5 +30,10 @@ config DDR_SPD For memory controllers that can utilize it, add enable support for using the JEDEC SDP standard. +config SYS_SPD_BUS_NUM + int "I2C bus number for DDR SPD" + depends on DDR_SPD || SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY + default 0 + source "drivers/ddr/altera/Kconfig" source "drivers/ddr/imx/Kconfig" diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 5fba5bb..ce559e9 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -263,8 +263,6 @@ */ #if !CONFIG_IS_ENABLED(DM_I2C) #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } -#else -#define CONFIG_SYS_SPD_BUS_NUM 0 #endif /* EEPROM */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 53c7198..94fa317 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -110,7 +110,6 @@ /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8e5d18f..4e96d2a 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3f32354..9d68f25 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -126,7 +126,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index bda2524..f1738b3 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -106,7 +106,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 0c13550..eda03da 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -95,7 +95,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5fb768a..290fd7c 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -90,7 +90,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6f5b759..29447e4 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -178,7 +178,6 @@ /* * DDR Setup */ -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x52 #define SPD_EEPROM_ADDRESS2 0x54 #define SPD_EEPROM_ADDRESS3 0x56 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 034cd00..51bc772 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -92,7 +92,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7430185..3927558 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 /* POST memory regions test */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 798688a..3b4ddb0 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -171,7 +171,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index e17bdca..dd389a9 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -23,7 +23,6 @@ #endif #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 75d655c..e81384a 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -13,7 +13,6 @@ /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index edb4e64..f39a940 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,8 +12,6 @@ /* Physical Memory Map */ -#define CONFIG_SYS_SPD_BUS_NUM 0 - #ifndef CONFIG_SPL #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 6271135..0e24209 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -13,7 +13,6 @@ /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 4ad62b4..fdd251a 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -14,7 +14,6 @@ /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index e532c34..7c60f28 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -16,7 +16,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index aeadf53..c0567c3 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -17,7 +17,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 96da4ab..a0e2127 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -24,7 +24,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 835fff4..9c4d2fe 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -29,7 +29,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 1669ecd..bc3a004 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -31,7 +31,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ diff --git a/include/configs/novena.h b/include/configs/novena.h index ee39b3c..9f18db4 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -39,7 +39,6 @@ /* I2C */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C EEPROM */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 1be548e..6bc8a6a 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -116,7 +116,6 @@ /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 #if defined(CONFIG_TARGET_P1020RDB_PD) @@ -346,8 +345,6 @@ #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } #endif -#define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */ - /* * I2C2 EEPROM */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 73f82fc..14f7bb9 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -118,8 +118,6 @@ #define CONFIG_SYS_LIME_BASE 0xc8000000 #define CONFIG_SYS_LIME_SIZE 0x04000000 /* 64 MB */ -#define CONFIG_SYS_SPD_BUS_NUM 0 - /* * General PCI * Memory space is mapped 1-1. diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 7f4bfb5..32d9df0 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -26,7 +26,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 /* I2C Configs */ -#define CONFIG_SYS_SPD_BUS_NUM 0 /* * We do have 128MB of memory on the Vybrid Tower board. Leave the last diff --git a/include/i2c.h b/include/i2c.h index 22add0b..e0ee94e 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -647,9 +647,6 @@ void i2c_early_init_f(void); #if !defined(CONFIG_SYS_RTC_BUS_NUM) #define CONFIG_SYS_RTC_BUS_NUM 0 #endif -#if !defined(CONFIG_SYS_SPD_BUS_NUM) -#define CONFIG_SYS_SPD_BUS_NUM 0 -#endif struct i2c_adapter { void (*init)(struct i2c_adapter *adap, int speed, |