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| author | Michal Simek <michal.simek@xilinx.com> | 2013-09-26 16:39:03 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2014-02-06 10:08:14 +0100 |
| commit | 31993d6a3585d478d792fc70240129b0ca03f55f (patch) | |
| tree | f455a62b784ed8b75ef5b5cb5a30dbc7c817930b | |
| parent | c83a35f65250a8bdb519cb26680437e5c93d133d (diff) | |
| download | u-boot-31993d6a3585d478d792fc70240129b0ca03f55f.zip u-boot-31993d6a3585d478d792fc70240129b0ca03f55f.tar.gz u-boot-31993d6a3585d478d792fc70240129b0ca03f55f.tar.bz2 | |
fpga: zynqpl: Add support for zc7015 device
Just extend tables with this new device.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | board/xilinx/zynq/board.c | 4 | ||||
| -rw-r--r-- | include/zynqpl.h | 5 |
2 files changed, 9 insertions, 0 deletions
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index a5b9bde..5a47149 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -23,6 +23,7 @@ Xilinx_desc fpga; /* It can be done differently */ Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10); +Xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15); Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20); Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30); Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); @@ -40,6 +41,9 @@ int board_init(void) case XILINX_ZYNQ_7010: fpga = fpga010; break; + case XILINX_ZYNQ_7015: + fpga = fpga015; + break; case XILINX_ZYNQ_7020: fpga = fpga020; break; diff --git a/include/zynqpl.h b/include/zynqpl.h index 6107cbf..c81446e 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -17,6 +17,7 @@ extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize); extern int zynq_info(Xilinx_desc *desc); #define XILINX_ZYNQ_7010 0x2 +#define XILINX_ZYNQ_7015 0x1b #define XILINX_ZYNQ_7020 0x7 #define XILINX_ZYNQ_7030 0xc #define XILINX_ZYNQ_7045 0x11 @@ -24,6 +25,7 @@ extern int zynq_info(Xilinx_desc *desc); /* Device Image Sizes */ #define XILINX_XC7Z010_SIZE 16669920/8 +#define XILINX_XC7Z015_SIZE 28085344/8 #define XILINX_XC7Z020_SIZE 32364512/8 #define XILINX_XC7Z030_SIZE 47839328/8 #define XILINX_XC7Z045_SIZE 106571232/8 @@ -33,6 +35,9 @@ extern int zynq_info(Xilinx_desc *desc); #define XILINX_XC7Z010_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" } +#define XILINX_XC7Z015_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" } + #define XILINX_XC7Z020_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" } |