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| author | Fabio Estevam <festevam@gmail.com> | 2021-12-18 18:10:20 -0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-01-08 11:16:03 -0500 |
| commit | 11907cb5cfbb30ab3923d10a874aee0bde8ec64c (patch) | |
| tree | 408e8710e97692d08dbbe30bbf7676496c320c83 | |
| parent | 47de135994b59f5787cba233f0102ab97a4e5726 (diff) | |
| download | u-boot-11907cb5cfbb30ab3923d10a874aee0bde8ec64c.zip u-boot-11907cb5cfbb30ab3923d10a874aee0bde8ec64c.tar.gz u-boot-11907cb5cfbb30ab3923d10a874aee0bde8ec64c.tar.bz2 | |
udoo_spl: Initialize the eSDHC controller in SPL
Currently, imx6q udoo board fails to boot like this:
U-Boot SPL 2022.01-rc3-00061-g95ca715adad3 (Dec 18 2021 - 18:04:40 -0300)
Trying to boot from MMC1
The reason is that the eSDHC controller is not initialized in SPL.
Initialize the eSDHC controller in SPL via C code as DM is not
used in SPL.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
| -rw-r--r-- | board/udoo/udoo_spl.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c index d9afbbb..647380e 100644 --- a/board/udoo/udoo_spl.c +++ b/board/udoo/udoo_spl.c @@ -254,4 +254,39 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); } + +#define USDHC3_CD_GPIO IMX_GPIO_NR(7, 0) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, +}; + +static const iomux_v3_cfg_t usdhc3_pads[] = { + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return !gpio_get_value(USDHC3_CD_GPIO); +} + +int board_mmc_init(struct bd_info *bis) +{ + SETUP_IOMUX_PADS(usdhc3_pads); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 4; + gpio_direction_input(USDHC3_CD_GPIO); + + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} #endif |