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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-07-16 08:43:50 +0300 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2021-09-21 10:05:37 +0300 |
| commit | 63ba551d70bc9b0b96de5e72b74744e637ef2a78 (patch) | |
| tree | 3715bf2df4477056bf73602fe4688b626ced7c06 | |
| parent | 7d4ce3ac582c1a9b244aa9867178e1c60e0d438c (diff) | |
| download | u-boot-63ba551d70bc9b0b96de5e72b74744e637ef2a78.zip u-boot-63ba551d70bc9b0b96de5e72b74744e637ef2a78.tar.gz u-boot-63ba551d70bc9b0b96de5e72b74744e637ef2a78.tar.bz2 | |
ARM: dts: at91: sam9x60: add bindings for CPU
Add bindings for CPU. This will allow displaying correctly the crystal,
CPU and master clock.
Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| -rw-r--r-- | arch/arm/dts/sam9x60.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 007646f..e801331 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -50,6 +50,18 @@ }; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + ARM9260_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,arm926ej-s"; + clocks = <&pmc PMC_TYPE_CORE 19>, <&pmc PMC_TYPE_CORE 11>, <&main_xtal>; + clock-names = "cpu", "master", "xtal"; + }; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; |