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| author | Simon Glass <sjg@chromium.org> | 2023-07-15 21:38:55 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng@tinylab.org> | 2023-07-17 17:12:26 +0800 |
| commit | db3820a2883ada53ca704fc393148657e44e0706 (patch) | |
| tree | ab86f3fa178f63a61699306e41deb1cc8978d536 | |
| parent | 1dd00b1be82556c35a68c90b187a0f096192fd5f (diff) | |
| download | u-boot-db3820a2883ada53ca704fc393148657e44e0706.zip u-boot-db3820a2883ada53ca704fc393148657e44e0706.tar.gz u-boot-db3820a2883ada53ca704fc393148657e44e0706.tar.bz2 | |
pci: Support autoconfig in SPL
Allow PCI autoconfig to be handled in SPL, so that we can set it up
correctly for boards which need to do this before U-Boot proper. This
includes qemu-x64_64 which needs to set up the video device while in
32-bit mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | drivers/pci/Kconfig | 5 | ||||
| -rw-r--r-- | drivers/pci/pci-uclass.c | 10 |
2 files changed, 14 insertions, 1 deletions
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 84a2ae9..aca439d 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -44,8 +44,13 @@ config SPL_PCI_PNP bool "Enable Plug & Play support for PCI" help Enable PCI memory and I/O space resource allocation and assignment. + This is required to auto configure the enumerated devices. + This is normally not done in SPL, but can be enabled if devices must + be set up in the SPL phase. Often it is enough to manually configure + one device, so this option can be disabled. + config PCI_REGION_MULTI_ENTRY bool "Enable Multiple entries of region type MEMORY in ranges for PCI" help diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 8d27e40..632c1a6 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -13,6 +13,7 @@ #include <log.h> #include <malloc.h> #include <pci.h> +#include <spl.h> #include <asm/global_data.h> #include <asm/io.h> #include <dm/device-internal.h> @@ -722,6 +723,9 @@ static bool pci_need_device_pre_reloc(struct udevice *bus, uint vendor, u32 vendev; int index; + if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(PCI_PNP)) + return true; + for (index = 0; !dev_read_u32_index(bus, "u-boot,pci-pre-reloc", index, &vendev); @@ -793,7 +797,9 @@ static int pci_find_and_bind_driver(struct udevice *parent, * space is pretty limited (ie: using Cache As RAM). */ if (!(gd->flags & GD_FLG_RELOC) && - !(drv->flags & DM_FLAG_PRE_RELOC)) + !(drv->flags & DM_FLAG_PRE_RELOC) && + (!CONFIG_IS_ENABLED(PCI_PNP) || + spl_phase() != PHASE_SPL)) return log_msg_ret("pre", -EPERM); /* @@ -918,6 +924,8 @@ int pci_bind_bus_devices(struct udevice *bus) } ret = pci_find_and_bind_driver(bus, &find_id, bdf, &dev); + } else { + debug("device: %s\n", dev->name); } if (ret == -EPERM) continue; |