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authorMatthias Schiffer <matthias.schiffer@ew.tq-group.com>2024-04-26 10:02:28 +0200
committerTom Rini <trini@konsulko.com>2024-05-15 10:46:47 -0600
commit1db973b65f9c1efbfa5370a95d6330f29557b3ab (patch)
treee962907193ca9889600627dd423801d8d8e90282
parente563593d6e3759519cb1b1493e67e032109c8cae (diff)
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dma: ti: k3-udma: invalidate prepared buffers before pushing to recv ring
Buffers must not have an unclean cache before being used for DMA - a pending write-back may corrupt the next dev-to-mem transfer otherwise. This was consistently noticeable during long TFTP transfers, when an ARP request is answered by U-Boot in the middle of the transfer: As U-Boot's arp_receive() reuses the receive buffer to prepare its reply packet, the beginning of one of the next incoming TFTP packets is overwritten by the ARP reply. The corrupted packet is ignored, but the TFTP transfer stalls for a few seconds until a timeout is detected and a retransmit is triggered. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Tested-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
-rw-r--r--drivers/dma/ti/k3-udma.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index e92ede5..da341a2 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -2677,6 +2677,9 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
cppi5_hdesc_set_pktlen(desc_rx, size);
cppi5_hdesc_attach_buf(desc_rx, dma_dst, size, dma_dst, size);
+ invalidate_dcache_range((unsigned long)dma_dst,
+ (unsigned long)(dma_dst + size));
+
flush_dcache_range((unsigned long)desc_rx,
ALIGN((unsigned long)desc_rx + uc->config.hdesc_size,
ARCH_DMA_MINALIGN));