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| author | Giulio Benetti <giulio.benetti@benettiengineering.com> | 2021-05-13 12:19:34 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-06-09 13:01:33 +0200 |
| commit | f2d91e606b7b903dbe7577954fa8e454a2d6e38c (patch) | |
| tree | aad6b45f6e8971fc98f36828e10ee236bd6ab83f | |
| parent | f544dfecd2801489ad7efe24bf3e3452b48f2c40 (diff) | |
| download | u-boot-f2d91e606b7b903dbe7577954fa8e454a2d6e38c.zip u-boot-f2d91e606b7b903dbe7577954fa8e454a2d6e38c.tar.gz u-boot-f2d91e606b7b903dbe7577954fa8e454a2d6e38c.tar.bz2 | |
ARM: dts: imxrt1050: move lcdif assigned clock to dtsi
Since we assume pll5 is the default lcdif clock source let's move
assigned-clocks(-parents) properties to .dtsi file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
| -rw-r--r-- | arch/arm/dts/imxrt1050-evk.dts | 3 | ||||
| -rw-r--r-- | arch/arm/dts/imxrt1050.dtsi | 2 |
2 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index 2052d4e..dc66fc9 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -238,9 +238,6 @@ display = <&display0>; status = "okay"; - assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>; - assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>; - display0: display0 { bits-per-pixel = <16>; bus-width = <16>; diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index 6f9da3f..eb5e09e 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -152,6 +152,8 @@ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMXRT1050_CLK_LCDIF>; clock-names = "per"; + assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>; + assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>; status = "disabled"; }; |