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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2020-04-24 20:20:15 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-05-01 11:34:01 -0400 |
| commit | c8ec1e3ff505a6ce44ec36e77d0579f5d01ed6b8 (patch) | |
| tree | 4d2ef0c85dc9683c2fbbe98cb2f60a0d4ab020b2 | |
| parent | f8dc7f2f18d324343737c72e27b6bd0ee8ff728e (diff) | |
| download | u-boot-c8ec1e3ff505a6ce44ec36e77d0579f5d01ed6b8.zip u-boot-c8ec1e3ff505a6ce44ec36e77d0579f5d01ed6b8.tar.gz u-boot-c8ec1e3ff505a6ce44ec36e77d0579f5d01ed6b8.tar.bz2 | |
arm: caches: protect dram_bank_mmu_setup access to bi_dram
Add protection in dram_bank_mmu_setup() to avoid access to bd->bi_dram
before relocation.
This patch allow to use the generic weak function dram_bank_mmu_setup
to activate the MMU and the data cache in SPL or in U-Boot before
relocation, when bd->bi_dram is not yet initialized.
In this cases, the MMU must be initialized explicitly with
mmu_set_region_dcache_behaviour function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| -rw-r--r-- | arch/arm/lib/cache-cp15.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index f8d2096..54509f1 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -91,6 +91,10 @@ __weak void dram_bank_mmu_setup(int bank) bd_t *bd = gd->bd; int i; + /* bd->bi_dram is available only after relocation */ + if ((gd->flags & GD_FLG_RELOC) == 0) + return; + debug("%s: bank: %d\n", __func__, bank); for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT; i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) + |