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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2022-04-08 12:28:21 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2022-04-12 19:10:44 +0200 |
| commit | a398d7d2d4be66b8d28319912f0aa500c8731c9d (patch) | |
| tree | 7824c1bcfcb13e56435b3f1bf3e561f7abd30528 | |
| parent | 9cec652ec56a3817c543b6ab82cc16257aaa2775 (diff) | |
| download | u-boot-a398d7d2d4be66b8d28319912f0aa500c8731c9d.zip u-boot-a398d7d2d4be66b8d28319912f0aa500c8731c9d.tar.gz u-boot-a398d7d2d4be66b8d28319912f0aa500c8731c9d.tar.bz2 | |
board: colibri-imx6ull: fix detecting sd card
Turns out on certain carrier boards (e.g. Iris V2) and under certain
circumstances (e.g. after a software reset) the SD card may have been
left in a strange state which later failed as follows:
Colibri iMX6ULL # mmc dev 0
Card did not respond to voltage select! : -110
Fix this as follows:
- Re-name the signaling voltage rail regulator from vmmc to vqmmc.
- Fix the name of the GPIO property to gpios.
- Specify 4-bit bus width, no write-protect capability and no 1.8
volt signaling voltage capability.
- Fix the clock vs. command pull-up vs. push-pull configuration.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rw-r--r-- | arch/arm/dts/imx6ull-colibri.dtsi | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/arch/arm/dts/imx6ull-colibri.dtsi b/arch/arm/dts/imx6ull-colibri.dtsi index 88d5e15..e9e60e8 100644 --- a/arch/arm/dts/imx6ull-colibri.dtsi +++ b/arch/arm/dts/imx6ull-colibri.dtsi @@ -41,9 +41,9 @@ regulator-max-microvolt = <5000000>; }; - reg_sd1_vmmc: regulator-sd1-vmmc { + reg_sd1_vqmmc: regulator-sd1-vqmmc { compatible = "regulator-gpio"; - gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>; + gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_snvs_reg_sd>; regulator-always-on; @@ -233,12 +233,15 @@ assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>; assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; assigned-clock-rates = <0>, <198000000>; + bus-width = <4>; cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* MMC_CD */ + disable-wp; + no-1-8-v; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - vmmc-supply = <®_sd1_vmmc>; + vqmmc-supply = <®_sd1_vqmmc>; status = "okay"; }; @@ -473,8 +476,8 @@ pinctrl_usdhc1: usdhc1-grp { fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 @@ -484,8 +487,8 @@ pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 @@ -495,8 +498,8 @@ pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 |